Allow implicit conversion from bit scalar to vec for st

[zluda-violet]

The inverse of #580, for st instead of ld.

[Copilot]

Pull request overview

This PR enables implicit conversion from vector types to bit scalar types for the st (store) instruction, mirroring the existing functionality for ld (load) instructions from PR #580. The change allows storing vector registers (e.g., v2.b32) to memory locations expecting scalar bit types (e.g., b64) when the total size matches.

Key changes:

• Added Display implementation for StCacheOperator to enable proper formatting of store instructions
• Extended relaxed type checking to allow vector-to-scalar bitcasts for store source operands
• Added test coverage demonstrating the conversion behavior

Reviewed changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated no comments.

File	Description
ptx_parser/src/ast.rs	Added Display implementation for StCacheOperator enum to format cache modifiers (.cg, .cs, .wt) and display block for St instruction
ptx/src/pass/insert_implicit_conversions.rs	Extended should_convert_relaxed_src to allow vector-to-scalar bitcast conversions using valid_vector_scalar_bitcast
ptx/src/pass/test/insert_implicit_conversions/default_relaxed.ptx	Added test function default_relaxed_st and expected output showing vector-to-scalar conversion for store operations

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