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Add Parsing Code For Scatter-Gather Patterns #3212

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@AmirhosseinPoolad AmirhosseinPoolad commented Jul 24, 2025

Adds xml parsing code for scatter-gather patterns, with a sample architecture (That doesn't quite make sense) and test to make sure the code actually runs.

Note that scatter-gather patterns are not implemented in VPR and adding the tag does nothing other than parsing the information in the architecture file.

Information about what scatter-gather patterns and what the tag means is available in the documentation for this PR.

@github-actions github-actions bot added libarchfpga Library for handling FPGA Architecture descriptions docs Documentation lang-cpp C/C++ code labels Jul 24, 2025
@AmirhosseinPoolad AmirhosseinPoolad changed the title [WIP] Add Parsing Code For Scatter-Gather Patterns Add Parsing Code For Scatter-Gather Patterns Jul 25, 2025
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To make sure I didn't accidentally break anything else, checked the generated RRGraphs for Titan and Titan-S10 and the diffs were identical other than the very first line with the tool_version attribute. Here's the diff for Titan for example:

diff branch.xml master.xml
1c1
< <rr_graph tool_comment="Generated from arch file stratixiv_arch.timing.xml" tool_name="vpr" tool_version="9.0.0-dev+v9.0.0-1553-g827e72b9c-dirty">
---
> <rr_graph tool_comment="Generated from arch file stratixiv_arch.timing.xml" tool_name="vpr" tool_version="9.0.0-dev+v9.0.0-1558-g6a1fe643f-dirty">

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Thanks! Various comments embedded.

---------------------
The content under the ``<scatter_gather_list>`` tag consists of one or more ``<sg_pattern>`` tags that are used to specify a scatter-gather pattern.
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Give high-level context on why we need this (specify multi-level switch patterns, rather than the direct wire-to-wire switch patterns of conventional switch blocks). These additional switches, wires and/or muxes will be added to the architecture, augmenting wires created using segment specifications and swiches created using switch box specifications.
The number of any additional wires or muxes created by scatter-gather specifications will not vary with routing channel width.

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High-level spec needs a picture showing the gather pattern, the scatter-gather node, and the scatter pattern. Link that to the high-level description.

.. code-block:: xml
<scatter_gather_list>
<sg_pattern name="name" type="unidir"> <!-- segment: attribute or tag? -->
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Delete self-comment.

<scatter_gather_list>
<sg_pattern name="name" type="unidir"> <!-- segment: attribute or tag? -->
<gather>
<wireconn num_conns="30" from_type="L16" from_switchpoint="0,12,8,4" side="rltb"/> <!-- Illegal to have to_type and to_switchpoint --> <!-- No above/under side -->
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Clarify in the comment that rltb allowed as source sides, but not other layers (above/under).

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Do you want this example to describe what it is doing and describe limitations later in the detailed sections?

<gather/>
<scatter>
<wireconn num_conns="30" to_type="L16" to_switchpoint="0" side="rtlb"/> <!-- Illegal to have from_type and from_switchpoint -->
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Suggest describing what you are doing here, and leaving legality rules for the detailed section later.

<scatter/>
<sg_link_list>
<sg_link name="L_UP" z_offset="1" x_offset="0" y_offset="0" mux="3D_SB_MUX" seg_type="TSV"/> <!-- One hot offsets -->
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Suggest explaining what you're doing. Instead of one-hot, either leave for detailed legality later or say only one of x,y,z offset can be non-zero.

const pugiutil::loc_data& loc_data) {
std::vector<t_sg_location> sg_location_list;
for (pugi::xml_node node : sg_pattern_tag.children()) {
if (strcmp(node.name(), "sg_location") != 0) continue;
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Shouldn't this be an error message instead of a skip?

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Or an assert if schema checking would have already caught this?

<clock buffer_size="auto" C_wire="2.5e-10"/>
</clocks>

<scatter_gather_list>
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Comment what this is doing.
This is a 2D architecture, so this 3D pattern should eventually be moved to a 3D arch (or maybe moved now?)

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