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[Packer] Fixed NightlyTest Failure with Tight Floorplan Constr. #3178

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AlexandreSinger
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The very tight floorplan constraints were failing after the recent changes to the iterative packing algorithm. After investigation I found that there is a bug with unrelated clustering and RAMs which is causing floorplan constraints to not be adhered to. The original code ignored this issue by not doing unrelated clustering when there are floorplan constraints.

To fix this issue, reimplemented what the code was originally doing to allow this testcase to proceed. This just moves the unrelated clustering to after trying all floorplan region options.

The very tight floorplan constraints were failing after the recent
changes to the iterative packing algorithm. After investigation I found
that there is a bug with unrelated clustering and RAMs which is causing
floorplan constraints to not be adhered to. The original code ignored
this issue by not doing unrelated clustering when there are floorplan
constraints.

To fix this issue, reimplemented what the code was originally doing to
allow this testcase to proceed. This just moves the unrelated clustering
to after trying all floorplan region options.
@github-actions github-actions bot added VPR VPR FPGA Placement & Routing Tool lang-cpp C/C++ code labels Jul 1, 2025
@AmirhosseinPoolad
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LGTM.

@AmirhosseinPoolad AmirhosseinPoolad merged commit bcf74d0 into verilog-to-routing:master Jul 2, 2025
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2 participants