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Merged
pull merged 4 commits into from
Jul 16, 2020
Merged

[pull] master from torvalds:master #26

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8e3709d
clk: mvebu: ARMADA_AP_CPU_CLK needs to select ARMADA_AP_CP_HELPER
nathanchance Jul 1, 2020
c2407ab
clk: AST2600: Add mux for EMMC clock
Jul 9, 2020
1e7468b
clk: Specify IOMEM dependency for HSDK pll driver
sulix Jun 30, 2020
f845669
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux…
torvalds Jul 16, 2020
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1 change: 1 addition & 0 deletions drivers/clk/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,7 @@ source "drivers/clk/versatile/Kconfig"
config CLK_HSDK
bool "PLL Driver for HSDK platform"
depends on OF || COMPILE_TEST
depends on IOMEM
help
This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
control.
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49 changes: 41 additions & 8 deletions drivers/clk/clk-ast2600.c
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Expand Up @@ -131,6 +131,18 @@ static const struct clk_div_table ast2600_eclk_div_table[] = {
{ 0 }
};

static const struct clk_div_table ast2600_emmc_extclk_div_table[] = {
{ 0x0, 2 },
{ 0x1, 4 },
{ 0x2, 6 },
{ 0x3, 8 },
{ 0x4, 10 },
{ 0x5, 12 },
{ 0x6, 14 },
{ 0x7, 16 },
{ 0 }
};

static const struct clk_div_table ast2600_mac_div_table[] = {
{ 0x0, 4 },
{ 0x1, 4 },
Expand Down Expand Up @@ -390,6 +402,11 @@ static struct clk_hw *aspeed_g6_clk_hw_register_gate(struct device *dev,
return hw;
}

static const char *const emmc_extclk_parent_names[] = {
"emmc_extclk_hpll_in",
"mpll",
};

static const char * const vclk_parent_names[] = {
"dpll",
"d1pll",
Expand Down Expand Up @@ -459,16 +476,32 @@ static int aspeed_g6_clk_probe(struct platform_device *pdev)
return PTR_ERR(hw);
aspeed_g6_clk_data->hws[ASPEED_CLK_UARTX] = hw;

/* EMMC ext clock divider */
hw = clk_hw_register_gate(dev, "emmc_extclk_gate", "hpll", 0,
scu_g6_base + ASPEED_G6_CLK_SELECTION1, 15, 0,
&aspeed_g6_clk_lock);
/* EMMC ext clock */
hw = clk_hw_register_fixed_factor(dev, "emmc_extclk_hpll_in", "hpll",
0, 1, 2);
if (IS_ERR(hw))
return PTR_ERR(hw);
hw = clk_hw_register_divider_table(dev, "emmc_extclk", "emmc_extclk_gate", 0,
scu_g6_base + ASPEED_G6_CLK_SELECTION1, 12, 3, 0,
ast2600_div_table,
&aspeed_g6_clk_lock);

hw = clk_hw_register_mux(dev, "emmc_extclk_mux",
emmc_extclk_parent_names,
ARRAY_SIZE(emmc_extclk_parent_names), 0,
scu_g6_base + ASPEED_G6_CLK_SELECTION1, 11, 1,
0, &aspeed_g6_clk_lock);
if (IS_ERR(hw))
return PTR_ERR(hw);

hw = clk_hw_register_gate(dev, "emmc_extclk_gate", "emmc_extclk_mux",
0, scu_g6_base + ASPEED_G6_CLK_SELECTION1,
15, 0, &aspeed_g6_clk_lock);
if (IS_ERR(hw))
return PTR_ERR(hw);

hw = clk_hw_register_divider_table(dev, "emmc_extclk",
"emmc_extclk_gate", 0,
scu_g6_base +
ASPEED_G6_CLK_SELECTION1, 12,
3, 0, ast2600_emmc_extclk_div_table,
&aspeed_g6_clk_lock);
if (IS_ERR(hw))
return PTR_ERR(hw);
aspeed_g6_clk_data->hws[ASPEED_CLK_EMMC] = hw;
Expand Down
1 change: 1 addition & 0 deletions drivers/clk/mvebu/Kconfig
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Expand Up @@ -42,6 +42,7 @@ config ARMADA_AP806_SYSCON

config ARMADA_AP_CPU_CLK
bool
select ARMADA_AP_CP_HELPER

config ARMADA_CP110_SYSCON
bool
Expand Down