Provide a custom tsi_t implementation with loadmem support

src/main/resources/testchipip/csrc/SimSerial.cc

@@ -2,9 +2,9 @@
 #include <svdpi.h>
 #include <vector>
 #include <string>
-#include <fesvr/tsi.h>
+#include "testchip_tsi.h"
 
-tsi_t *tsi = NULL;
+testchip_tsi_t *tsi = NULL;
 
 extern "C" int serial_tick(
         unsigned char out_valid,
@@ -24,7 +24,8 @@ extern "C" int serial_tick(
         if (!vpi_get_vlog_info(&info))
           abort();
 
-        tsi = new tsi_t(info.argc, info.argv);
+        // TODO: We should somehow inspect whether or not our backing memory supports loadmem, instead of unconditionally setting it to true
+        tsi = new testchip_tsi_t(info.argc, info.argv, true);
     }
 
     tsi->tick(out_valid, out_bits, in_ready);

src/main/resources/testchipip/csrc/testchip_tsi.cc

@@ -0,0 +1,30 @@
+#include "testchip_tsi.h"
+
+testchip_tsi_t::testchip_tsi_t(int argc, char** argv, bool can_have_loadmem) : tsi_t(argc, argv)
+{
+  has_loadmem = false;
+  std::vector<std::string> args(argv + 1, argv + argc);
+  for (auto& arg : args) {
+    if (arg.find("+loadmem=") == 0)
+      has_loadmem = can_have_loadmem;
+  }
+}
+
+
+void testchip_tsi_t::write_chunk(addr_t taddr, size_t nbytes, const void* src)
+{
+  if (is_loadmem) {
+    load_mem_write(taddr, nbytes, src);
+  } else {
+    tsi_t::write_chunk(taddr, nbytes, src);
+  }
+}
+
+void testchip_tsi_t::read_chunk(addr_t taddr, size_t nbytes, void* dst)
+{
+  if (is_loadmem) {
+    load_mem_read(taddr, nbytes, dst);
+  } else {
+    tsi_t::read_chunk(taddr, nbytes, dst);
+  }
+}

src/main/resources/testchipip/csrc/testchip_tsi.h

@@ -0,0 +1,31 @@
+#ifndef __TESTCHIP_TSI_H
+#define __TESTCHIP_TSI_H
+
+#include <fesvr/tsi.h>
+#include <fesvr/htif.h>
+
+class testchip_tsi_t : public tsi_t
+{
+ public:
+  testchip_tsi_t(int argc, char** argv, bool has_loadmem);
+  virtual ~testchip_tsi_t() {};
+
+  void write_chunk(addr_t taddr, size_t nbytes, const void* src) override;
+  void read_chunk(addr_t taddr, size_t nbytes, void* dst) override;
+  void load_program() {
+    switch_to_target();
+    is_loadmem = has_loadmem;
+    tsi_t::load_program();
+    is_loadmem = false;
+  }
+
+ protected:
+  virtual void load_mem_write(addr_t taddr, size_t nbytes, const void* src) { };
+  virtual void load_mem_read(addr_t taddr, size_t nbytes, void* dst) { };
+  bool has_loadmem;
+
+ private:
+
+  bool is_loadmem;
+};
+#endif

src/main/scala/SerialAdapter.scala

@@ -224,6 +224,8 @@ class SimSerial(w: Int) extends BlackBox with HasBlackBoxResource {
 
   addResource("/testchipip/vsrc/SimSerial.v")
   addResource("/testchipip/csrc/SimSerial.cc")
+  addResource("/testchipip/csrc/testchip_tsi.cc")
+  addResource("/testchipip/csrc/testchip_tsi.h")
 }
 
 case class SerialTLParams(memParams: MasterPortParams, isMemoryDevice: Boolean = false, width: Int = 4)