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Merge pull request #20 from ucb-bar/bumprc
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Bump rocket-chip
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jerryz123 authored May 31, 2023
2 parents d5f196a + 46323fc commit c44c12b
Showing 1 changed file with 11 additions and 10 deletions.
21 changes: 11 additions & 10 deletions src/main/scala/cva6/CVA6Tile.scala
Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,8 @@ case class CVA6CoreParams(
val useBitManipCrypto: Boolean = false
val useCryptoNIST: Boolean = false
val useCryptoSM: Boolean = false
val traceHasWdata: Boolean =false
val traceHasWdata: Boolean = false
val useConditionalZero: Boolean = false
}

case class CVA6TileAttachParams(
Expand Down Expand Up @@ -272,18 +273,18 @@ class CVA6TileModuleImp(outer: CVA6Tile) extends BaseTileModuleImp(outer){
//outer.traceSourceNode.bundle <> core.io.trace_o.asTypeOf(outer.traceSourceNode.bundle)

for (w <- 0 until outer.cva6Params.core.retireWidth) {
outer.traceSourceNode.bundle(w).valid := core.io.trace_o(traceInstSz*w + 2)
outer.traceSourceNode.bundle(w).iaddr := core.io.trace_o(traceInstSz*w + 42, traceInstSz*w + 3)
outer.traceSourceNode.bundle(w).insn := core.io.trace_o(traceInstSz*w + 74, traceInstSz*w + 43)
outer.traceSourceNode.bundle(w).priv := core.io.trace_o(traceInstSz*w + 77, traceInstSz*w + 75)
outer.traceSourceNode.bundle(w).exception := core.io.trace_o(traceInstSz*w + 78)
outer.traceSourceNode.bundle(w).interrupt := core.io.trace_o(traceInstSz*w + 79)
outer.traceSourceNode.bundle(w).cause := core.io.trace_o(traceInstSz*w + 87, traceInstSz*w + 80)
outer.traceSourceNode.bundle(w).tval := core.io.trace_o(traceInstSz*w + 127, traceInstSz*w + 88)
outer.traceSourceNode.bundle.insns(w).valid := core.io.trace_o(traceInstSz*w + 2)
outer.traceSourceNode.bundle.insns(w).iaddr := core.io.trace_o(traceInstSz*w + 42, traceInstSz*w + 3)
outer.traceSourceNode.bundle.insns(w).insn := core.io.trace_o(traceInstSz*w + 74, traceInstSz*w + 43)
outer.traceSourceNode.bundle.insns(w).priv := core.io.trace_o(traceInstSz*w + 77, traceInstSz*w + 75)
outer.traceSourceNode.bundle.insns(w).exception := core.io.trace_o(traceInstSz*w + 78)
outer.traceSourceNode.bundle.insns(w).interrupt := core.io.trace_o(traceInstSz*w + 79)
outer.traceSourceNode.bundle.insns(w).cause := core.io.trace_o(traceInstSz*w + 87, traceInstSz*w + 80)
outer.traceSourceNode.bundle.insns(w).tval := core.io.trace_o(traceInstSz*w + 127, traceInstSz*w + 88)
}
} else {
outer.traceSourceNode.bundle := DontCare
outer.traceSourceNode.bundle map (t => t.valid := false.B)
outer.traceSourceNode.bundle.insns map (t => t.valid := false.B)
}

// connect the axi interface
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