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[AMD] Refactored namespace hierachy
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knwng committed Nov 25, 2024
1 parent e3ab295 commit 6f7ba0a
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Showing 10 changed files with 33 additions and 43 deletions.
6 changes: 1 addition & 5 deletions third_party/amd/include/Dialect/TritonAMDGPU/IR/Dialect.h
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Expand Up @@ -41,10 +41,6 @@
#define GET_OP_CLASSES
#include "amd/include/Dialect/TritonAMDGPU/IR/Ops.h.inc"

namespace mlir {
namespace triton {
namespace amdgpu {} // namespace amdgpu
} // namespace triton
} // namespace mlir
namespace mlir::triton::amdgpu {} // namespace mlir::triton::amdgpu

#endif // TRITON_DIALECT_TRITONGPU_IR_DIALECT_H_
8 changes: 5 additions & 3 deletions third_party/amd/include/TritonAMDGPUToLLVM/GCNAsmFormat.h
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Expand Up @@ -31,10 +31,13 @@
#include <string>

namespace mlir {

class ConversionPatternRewriter;
class Location;

namespace triton {
} // namespace mlir

namespace mlir::triton {
using llvm::StringRef;

class GCNInstr;
Expand Down Expand Up @@ -397,7 +400,6 @@ struct GCNMemInstr : public GCNInstrBase<GCNMemInstr> {
}
};

} // namespace triton
} // namespace mlir
} // namespace mlir::triton

#endif // TRITON_CONVERSION_TRITON_GPU_TO_LLVM_ASM_FORMAT_H_
16 changes: 10 additions & 6 deletions third_party/amd/include/TritonAMDGPUToLLVM/Passes.h
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Expand Up @@ -13,12 +13,16 @@ namespace mlir {
class ModuleOp;
template <typename T> class OperationPass;

namespace triton {
} // namespace mlir

namespace mlir::triton {

#define GEN_PASS_DECL
#include "TritonAMDGPUToLLVM/Passes.h.inc"

namespace AMD {
} // namespace mlir::triton

namespace mlir::triton::AMD {
std::unique_ptr<OperationPass<ModuleOp>>
createDecomposeUnsupportedConversionsPass(StringRef targetArch);

Expand All @@ -29,7 +33,9 @@ createDecomposeUnsupportedConversionsPass(StringRef targetArch);
/// @return created pass
std::unique_ptr<OperationPass<ModuleOp>>
createOptimizeLDSUsagePass(StringRef arch, int32_t customLDSLimit = 0);
} // namespace AMD
} // namespace mlir::triton::AMD

namespace mlir::triton {

std::unique_ptr<OperationPass<ModuleOp>>
createConvertTritonAMDGPUToLLVMPass(StringRef targetArch, bool ftz);
Expand All @@ -45,8 +51,6 @@ createTritonAMDGPULowerInstructionSchedHintsPass(StringRef arch,
#define GEN_PASS_REGISTRATION
#include "TritonAMDGPUToLLVM/Passes.h.inc"

} // namespace triton

} // namespace mlir
} // namespace mlir::triton

#endif
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Expand Up @@ -9,6 +9,6 @@ void populateExtractSliceOpToLLVMPatterns(
mlir::LLVMTypeConverter &typeConverter, mlir::RewritePatternSet &patterns,
mlir::PatternBenefit benefit);

}
} // namespace mlir::triton::AMD

#endif
14 changes: 5 additions & 9 deletions third_party/amd/lib/TritonAMDGPUToLLVM/BuiltinFuncToLLVM.cpp
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Expand Up @@ -6,12 +6,10 @@
#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
#include "triton/Conversion/TritonGPUToLLVM/Utility.h"

namespace mlir {
namespace triton {
namespace mlir::triton {
#define GEN_PASS_DEF_CONVERTBUILTINFUNCTOLLVM
#include "TritonAMDGPUToLLVM/Passes.h.inc"
} // namespace triton
} // namespace mlir
} // namespace mlir::triton

using namespace mlir;

Expand Down Expand Up @@ -242,15 +240,13 @@ struct ConvertBuiltinFuncToLLVM
}
};

} // anonymous namespace
} // namespace

namespace mlir {
namespace triton {
namespace mlir::triton {

std::unique_ptr<OperationPass<ModuleOp>>
createConvertBuiltinFuncToLLVMPass(bool ftz) {
return std::make_unique<ConvertBuiltinFuncToLLVM>(ftz);
}

} // namespace triton
} // namespace mlir
} // namespace mlir::triton
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Expand Up @@ -11,12 +11,10 @@
#include <numeric>

using namespace mlir;
namespace mlir {
namespace triton {
namespace mlir::triton {
#define GEN_PASS_DEF_DECOMPOSEUNSUPPORTEDAMDCONVERSIONS
#include "TritonAMDGPUToLLVM/Passes.h.inc"
} // namespace triton
} // namespace mlir
} // namespace mlir::triton

namespace {

Expand Down
6 changes: 2 additions & 4 deletions third_party/amd/lib/TritonAMDGPUToLLVM/GCNAsmFormat.cpp
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Expand Up @@ -5,8 +5,7 @@
#include "llvm/Support/raw_ostream.h"
#include <sstream> // unify to llvm::raw_string_ostream ?

namespace mlir {
namespace triton {
namespace mlir::triton {

GCNInstr::Operand *
GCNBuilder::newOperand(mlir::Value value, StringRef constraint,
Expand Down Expand Up @@ -187,5 +186,4 @@ GCNInstrExecution::getArgList() const {
return args;
}

} // namespace triton
} // namespace mlir
} // namespace mlir::triton
14 changes: 5 additions & 9 deletions third_party/amd/lib/TritonAMDGPUToLLVM/TritonGPUToLLVM.cpp
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Expand Up @@ -26,12 +26,10 @@
#include "triton/Dialect/TritonGPU/IR/Dialect.h"
#include "triton/Dialect/TritonNvidiaGPU/IR/Dialect.h"

namespace mlir {
namespace triton {
namespace mlir::triton {
#define GEN_PASS_DEF_CONVERTTRITONAMDGPUTOLLVM
#include "TritonAMDGPUToLLVM/Passes.h.inc"
} // namespace triton
} // namespace mlir
} // namespace mlir::triton

using namespace mlir;

Expand Down Expand Up @@ -259,15 +257,13 @@ struct ConvertTritonAMDGPUToLLVM
}
};

} // anonymous namespace
} // namespace

namespace mlir {
namespace triton {
namespace mlir::triton {

std::unique_ptr<OperationPass<ModuleOp>>
createConvertTritonAMDGPUToLLVMPass(StringRef targetArch, bool ftz) {
return std::make_unique<ConvertTritonAMDGPUToLLVM>(targetArch, ftz);
}

} // namespace triton
} // namespace mlir
} // namespace mlir::triton
Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,7 @@ class UpcastMXFPOpPattern : public ConvertOpToLLVMPattern<UpcastMXFPOp> {
return success();
}
};
} // anonymous namespace
} // namespace

void mlir::triton::AMD::populateUpcastMXFPToLLVMPatterns(
LLVMTypeConverter &typeConverter, RewritePatternSet &patterns,
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -891,7 +891,7 @@ struct PipelinePass : public TritonAMDGPUStreamPipelineV2Base<PipelinePass> {
return numStages;
}
};
} // anonymous namespace
} // namespace

std::unique_ptr<Pass>
mlir::createTritonAMDGPUStreamPipelineV2Pass(int numStages, int prefetch) {
Expand Down

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