Skip to content

Commit

Permalink
Tunable overclocking up to 128MHz
Browse files Browse the repository at this point in the history
- Limit the SDIO card to a real 18MHz with overclock
- Fix serial speed with overclock, but keep value in config/info menu
- Elapsed time adjustment, but keep faster delays()
- Set F103xx high density by default in SPD/stm32f10x.h
- M575 baudrate adjustment
- fix conflict with maple flash functions
- Onboard SPI SD fix over 96 MHz (SKRmini)
- Handle BOARD_F_CPU on the F1 like in STM32 HAL

Signed-off-by: Tanguy Pruvot <tanguy.pruvot@gmail.com>
  • Loading branch information
tpruvot committed Jun 27, 2021
1 parent 45a4b20 commit 69da9d2
Show file tree
Hide file tree
Showing 15 changed files with 16,898 additions and 4 deletions.
87 changes: 87 additions & 0 deletions Marlin/src/HAL/STM32F1/HAL.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -280,7 +280,94 @@ static void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) {

TERN_(POSTMORTEM_DEBUGGING, extern void install_min_serial());

#ifdef OVERCLOCK

#define RCC_HSE_ON ((uint32_t)0x00010000)
#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002)
#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000)
#define RCC_HCLK_Div1 ((uint32_t)0x00000000)
#define RCC_HCLK_Div2 ((uint32_t)0x00000400)
#define RCC_PLLMul_9 ((uint32_t)0x001C0000) // 72 MHz
#define RCC_PLLMul_10 ((uint32_t)0x00200000) // 80 MHz
#define RCC_PLLMul_12 ((uint32_t)0x00280000) // 96 MHz
#define RCC_PLLMul_13 ((uint32_t)0x002C0000) // 104MHz
#define RCC_PLLMul_14 ((uint32_t)0x00300000) // 112MHz
#define RCC_PLLMul_16 ((uint32_t)0x00380000) // 128MHz
#define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000)
#define RCC_FLAG_PLLRDY ((uint8_t)0x39)
#define FLASH_Latency_2 ((uint32_t)0x00000002)
#define FLASH_PrefetchBuffer_Enable ((uint32_t)0x00000010)

extern "C" {
void RCC_DeInit(void);
void RCC_HSEConfig(uint32_t RCC_HSE);
void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource);
uint8_t RCC_GetSYSCLKSource(void);
void RCC_HCLKConfig(uint32_t RCC_SYSCLK);
void RCC_PCLK1Config(uint32_t RCC_HCLK);
void RCC_PCLK2Config(uint32_t RCC_HCLK);
typedef enum {RESET = 0, SET = !RESET} FlagStatus;
FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG);
typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState;
void RCC_PLLCmd(FunctionalState NewState);
void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul);
typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
ErrorStatus RCC_WaitForHSEStartUp(void);
void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer);
void FLASH_SetLatency(uint32_t FLASH_Latency);
}

/* Overclock the STM32F103, up to 128 MHz */
static uint32_t overclock_stm32f103() {
// Reset the RCC config. to the default state,
// doesn't modify PCLK, LSI, LSE and RTC clocks
RCC_DeInit();

// Enable the External High Speed oscillator
RCC_HSEConfig(RCC_HSE_ON);
ErrorStatus HSEStartUpStatus = RCC_WaitForHSEStartUp();
if (HSEStartUpStatus == SUCCESS) {
// Enable Prefetch Buffer
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
// Flash 2 wait state
FLASH_SetLatency(FLASH_Latency_2);

// HCLK = SYSCLK
RCC_HCLKConfig(RCC_SYSCLK_Div1);
// PCLK1 = HCLK/2
RCC_PCLK1Config(RCC_HCLK_Div2);
// PCLK2 = HCLK
RCC_PCLK2Config(RCC_HCLK_Div1);

uint32_t mul_pll = RCC_PLLMul_9;
switch(OC_TARGET_MHZ) {
case 80: mul_pll = RCC_PLLMul_10; break;
case 96: mul_pll = RCC_PLLMul_12; break;
case 104: mul_pll = RCC_PLLMul_13; break;
case 112: mul_pll = RCC_PLLMul_14; break;
case 128: mul_pll = RCC_PLLMul_16; break;
}
RCC_PLLConfig(RCC_PLLSource_HSE_Div1, mul_pll);

// Enable main PLL
RCC_PLLCmd(ENABLE);
// Wait till PLL is ready
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {;}
// Select PLL as system clock source
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
// Wait till PLL is used as system clock source
while(RCC_GetSYSCLKSource() != 0x08) {;}

return OC_TARGET_MHZ;
}
return OC_BASE_MHZ;
}
#endif // OVERCLOCK

void HAL_init() {
#ifdef OVERCLOCK
overclock_stm32f103();
#endif
NVIC_SetPriorityGrouping(0x3);
#if PIN_EXISTS(LED)
OUT_WRITE(LED_PIN, LOW);
Expand Down
12 changes: 12 additions & 0 deletions Marlin/src/HAL/STM32F1/HAL.h
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,18 @@
#include "../shared/math_32bit.h"
#include "../shared/HAL_SPI.h"

#ifdef BOARD_F_CPU
#undef F_CPU
#define F_CPU BOARD_F_CPU
#endif

#ifdef OVERCLOCK
#if F_CPU != (1000000U * OC_TARGET_MHZ)
#undef F_CPU
#define F_CPU (1000000U * OC_TARGET_MHZ)
#endif
#endif

#include "fastio.h"
#include "watchdog.h"

Expand Down
6 changes: 5 additions & 1 deletion Marlin/src/HAL/STM32F1/HAL_SPI.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -81,7 +81,11 @@ void spiInit(uint8_t spiRate) {
* so the minimum prescale of SPI1 is DIV4, SPI2/SPI3 is DIV2
*/
#if SPI_DEVICE == 1
#define SPI_CLOCK_MAX SPI_CLOCK_DIV4
#if defined(OVERCLOCK) && OC_TARGET_MHZ > 96
#define SPI_CLOCK_MAX SPI_CLOCK_DIV8 // SKRmini onboard SD (Fysetc LCD is ok on SPI2)
#else
#define SPI_CLOCK_MAX SPI_CLOCK_DIV4
#endif
#else
#define SPI_CLOCK_MAX SPI_CLOCK_DIV2
#endif
Expand Down
Loading

0 comments on commit 69da9d2

Please sign in to comment.