xtensa

All CPU and MCU documentation in one place

Free and open (as much as possible) integrated SDK for ESP8266/ESP8285 chips

ESP32 software USB host through general IO pins. We can connect up to 4 USB-LS HID (keyboard mouse joystick) devices simultaneously.

A compiler for ARM, X86, MSP430, xtensa and more implemented in pure Python

Linux port for xtensa architecture. None of these branches are stable.

Peripheral Access Crates for Espressif SoCs and modules

MCP server + CLI + Codex/Claude skill for embedded debugging via probe-rs or OpenOCD — ARM Cortex-M, RISC-V, and Xtensa (ESP32), with AI crash diagnosis

Implementation of target-xtensa for QEMU.

A kernel written in Rust

FreeRTOS for Cadence Tensilica HIFI 4 DSP on R329, D1-H, T113 With GCC Compiler

Real Linux 6.11 running natively on the ESP32-S3's Xtensa cores (not emulated), with working WiFi and the chip's hardware RSA accelerator exposed to the Linux Crypto API. One flashable image; 16MB flash / 8MB PSRAM; NOMMU; STA-only.

Forth for ESP-8266

Interpreter experiment. Testing dispatch methods: Switching, Direct/Indirect Threaded Code, Tail-Calls and Inlining

ESP32 Firmware Patching Framework with Streamlined Binary/Runtime Patching Methods. Used in conjunction with Platformio and Ghidra.

Generating the call graph from elf binary file

Run Linux on esp8266.

take off every zig (forked)

IDAPython plugin for Tensilica Xtensa (as seen in ESP8266), version 2

Bare-metal programming on ESP32-S3 dual-core Xtensa LX7 without using Espressif's ESP-IDF