SBTCVM is a virtual machine implementation of a balanced ternary (base 3) computer. Features several compiled languages for ternary software development.

[no longer supported, please see SBTCVM-Gen2-9] Simple Balanced Ternary Computer Virtual Machine: Mark 2 is a simple Balanced Ternary VM programmed in python and Pygame.

A virtual ternary OISC machine (One Instruction Set Computer) inspired by 1950s Soviet hardware

A virtual machine and toolchain for a MIPS-like architecture based on balanced ternary arithmetic

Termite is a virtual machine for a ternary-based RISC CPU architecture.

Tera - A simulated ternary (base 3) CPU, assembly language, assembler and decompiler. Uses trytes made up of 9 trits rather than bytes of 8 bits.

Simple Balanced Ternary Computer Virtual Machine: Mark 2 is a simple Balanced Ternary VM programmed in python and Pygame.

A translator to translate RV32I to REBEL-6. Includes custom assemblers to output RV32I (and hopefully soon REBEL-6) MRCS-readable object files, and assembly level simulators to simulate RV32I and REBEL-6 assembly code execution

Balanced ternary logic SoC with CPU, memory controllers, and complete synthesis flow for silicon fabrication

Balanced ternary arithmetic library for Rust

SBTNET is a system for packet-switched balanced ternary computer networking.

A poorly implemented VM with a MIPS-style architecture based on balanced ternary arithmetic

Ternary machine emulator, written in C

Public Domain (⊄) Computer on FPGA

Tools for use with the Triton CPU architecture

A simple Binary-Coded Ternary implementation in Rust