nand

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manuemmanuel / Gates-Verilog-HDL

This repository contains a collection of basic digital logic gates implemented in Verilog HDL (Hardware Description Language).

verilog and verilog-hdl nand or not gates nor

Updated May 14, 2024
Verilog

Sakshipandey04 / 100-Days-RTL-Coding-Challenge

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Welcome to my #100DaysOfRTL challenge! This repository is a daily log of my journey to master Register Transfer Level (RTL) coding, digital logic design and hardware simulation using Verilog. Includes gates, sequential & combinational circuits and waveform analysis.

rtl verilog coding-challenge xor nand gates rtlcoding

Updated Nov 2, 2025
Verilog

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