mealy-machine

Here are 5 public repositories matching this topic...

utkarshad21 / FSM-Sequence-Detector-using-Verilog

FSM: Sequence Detector using Verilog HDL

fsm verilog hdl verilog-hdl mealy-machine verilog-project verilog-code sequence-detector mealy-fsm sequence-detection sequence-detector-11010

Updated Jul 12, 2024
Verilog

MuballighHossain / Mealy_Machine_VLSI

Star

verilog vlsi mealy-machine mealy mealy-machine-code

Updated Aug 20, 2022
Verilog

shubhpatel9 / 32-bit-register-CPU

Star

Computer architecture course team project

mips-assembly verilog m mips-architecture mealy-machine moore-machine pipelining-capabilities

Updated Jan 1, 2021
Verilog

AyushVerma17 / advanced-vending-machine-rtl

Star

Comparative study of Mealy vs Moore FSM architectures in Verilog - Multi-item vending machine controller with timing analysis, and power metrics (79-81.5MHz on Artix-7)

fsm fpga state-machine verilog digital-design xilinx-vivado mealy-machine artix7 moore-machine comparative-study vlsi-design rtl-design hardware-design

Updated Oct 2, 2025
Verilog

Arsham-LH / Logic-Circuits

Star

Simulation of logic circuits using Verilog, Proteus and other tools.

fsm verilog proteus digital-circuits mealy-machine moore-machine logic-circuits

Updated Sep 5, 2024
Verilog

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mealy-machine

Here are 5 public repositories matching this topic...

utkarshad21 / FSM-Sequence-Detector-using-Verilog

MuballighHossain / Mealy_Machine_VLSI

shubhpatel9 / 32-bit-register-CPU

AyushVerma17 / advanced-vending-machine-rtl

Arsham-LH / Logic-Circuits

Improve this page

Add this topic to your repo