GUI for glider logic in Conway's game of life.
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Updated
Feb 1, 2020 - Python
GUI for glider logic in Conway's game of life.
MikroLeo project files (schematic, PCB, assembler, emulator/debugger, circuit simulation file, documentation, example of programs etc). MikroLeo is a 4-bit microcomputer developed mainly for educational purposes and distributed for free under open-source licenses.
Creating Logic Functions [AND, OR, NOT, XNOR, XOR, NAND, etc] using Neural Network
GitHub Actions for usage with Google's 130nm manufacturable PDK for SkyWater Technology found @ https://github.com/google/skywater-pdk
An esoteric language based on logic gates.
Logic Gate Simulator for Linux
LogicCircuit is a program that helps build/simulate simple circuits using logic gates. It is meant to teach people the basics of how logic gates work.
The purpose of this repository is to track my Mathematics YHP Journey.
Solves boolean expressions and simplifies them, draws logic-circuits and constructs circuits and boolean terms from truth-table values and converts boolean expressions to NAND and NOR.
Embedded domain-specific combinator library for the abstract assembly and automated synthesis of logical circuits.
Raspberry PI-based IC tester
Minimal pure Python library for building and working with logical circuits.
A simple circuit simulator
Create classical logic gates using quantum gate with Qiskit.
While I was exploring Logic gates, I thought, why not simulate the same concept using python. I started writing the code and found it so simple. I started from basic gates like AND OR NOT; after that, I moved slowly to the Half adder, subtractor, advanced Logic gates, comparator, etc. Still more to add.
A Brief Introduction to Artificial Neural Networks: The or and xor logic gates and training an ANN to play Flappy Bird.
An old python code that simulates Logic Gates.
Logic Gates LED Control using Raspberry Pi and Neural Networks
Python program to simulate logic circuits
The Logic Gates generator is a command line program that makes use of Python to generate logic gate schematics of (theoretically) any size, along with their Karnaugh map.
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