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A curated list of awesome Rowhammer papers, tools, and info resources. 👉 Content coming soon, stay tuned!
An attempt at making a 2-way superscalar out-of-order riscv processor for an Arty s25 fpga.
Updated
Oct 7, 2024
SystemVerilog
A simple command line tool for reading and writing AT24/EE1004 SPD EEPROMs.
Updated
Sep 24, 2020
Python
Lusin's Random-Access-Humor resulted in the creation of the RAM Overclocker!
DDR3 controller for nMigen (WIP)
Updated
Dec 25, 2023
Python
将图像数据从以太网传输到DDR3，再传输到HDMI进行显示的vivado例程
A DDR3 to DDR3L (and vice-versa) converter
Updated
May 8, 2023
OpenSCAD
Demo board for the i.MX6ULL Single-Core Processor with Arm Cortex-A7 Core
Updated
Jul 19, 2023
OpenSCAD
Test SBC with Allwinner A13
4-Layer XC7Z010 DDR3 Layout
A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.
Updated
May 10, 2020
Verilog
SpaceVNX (VITA 74.4) carrier based on Zynq-7000.
在FPGA中将图像数据输入到DDR3中，再输送到HDMI接口上进行显示。
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