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6 public repositories
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Nintendo Entertainment System (NES) / Famicom / Famiclones chip reversing
Updated
Mar 22, 2025
Verilog
Replacement "chips" for NeoGeo systems
Updated
Mar 22, 2025
Verilog
A clock-accurate FPGA clone of the NES 2A03(7) APU (pAPU), created on the basis of reverse engineering.
Updated
Jan 15, 2025
Verilog
A clock-accurate FPGA clone of the NMOs processor 6502, created on the basis of reverse engineering.
Updated
Nov 8, 2024
Verilog
A clock-accurate FPGA clone of the NES 2C02(7) PPU, created on the basis of reverse engineering.
Updated
Jan 12, 2025
Verilog
RISC-V System on Chip Builder
Updated
Sep 27, 2020
Verilog
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