A java implementation of reversi / othello for two players/computers

A 4-bit register designed using D-flip flops and 4 :1 multiplexers.

A Simple Mathematical Expression Evaluator in ARM Assembly

ARM-SIM, VISUAL, Microprogramming, Cache Implementation, ALU in VHDL

armv6 simulator

Assignments which were part of the course on Computer Architecture (ARM Assembly) taught by Prof. Anshul Kumar

The repository has the codes and files associated with MPCA LAB 2019-2023