soc: esp32_net: added esp32_net as an option

to use esp32 core 1 as a separate CPU, also
provide infrastructure to load firmware to
that CPU

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>

boards/xtensa/esp32_net/Kconfig.board

@@ -0,0 +1,8 @@
+# ESP32 board configuration
+
+# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_ESP32_NET
+	bool "ESP32 Board configuration for APP_CPU"
+	depends on SOC_ESP32_NET

boards/xtensa/esp32_net/Kconfig.defconfig

@@ -0,0 +1,25 @@
+# ESP32_NET board configuration
+
+# Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD
+	default "esp32_net"
+	depends on BOARD_ESP32_NET
+
+config ENTROPY_ESP32_RNG
+	default y if ENTROPY_GENERATOR
+
+if BT
+
+config HEAP_MEM_POOL_SIZE
+	default 16384
+
+config ENTROPY_GENERATOR
+	default y
+
+choice BT_HCI_BUS_TYPE
+	default BT_ESP32
+endchoice
+
+endif # BT

boards/xtensa/esp32_net/board.cmake

@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: Apache-2.0
+
+if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
+  set(OPENOCD OPENOCD-NOTFOUND)
+endif()
+find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
+
+include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/xtensa/esp32_net/doc/index.rst

@@ -0,0 +1,153 @@
+.. _esp32_net:
+
+ESP32-NET
+#########
+
+Overview
+********
+
+ESP32_NET is a board configuration to allow zephyr application building
+targeted to ESP32 APP_CPU only, please refer ESP32 board to a more complete
+list of features.
+
+System requirements
+*******************
+
+Prerequisites
+=============
+
+The ESP32 toolchain :file:`xtensa-esp32-elf` is required to build this port.
+The toolchain installation can be performed in two ways:
+
+#. Automatic installation
+
+   .. code-block:: console
+
+      west espressif install
+
+   .. note::
+
+      By default, the toolchain will be downloaded and installed under $HOME/.espressif directory
+      (%USERPROFILE%/.espressif on Windows).
+
+#. Manual installation
+
+   Follow the `ESP32 Toolchain`_ link to download proper OS package version.
+   Unpack the toolchain file to a known location as it will be required for environment path configuration.
+
+Build Environment Setup
+=======================
+
+Some variables must be exported into the environment prior to building this port.
+Find more information at :ref:`env_vars` on how to keep this settings saved in you environment.
+
+.. note::
+
+   In case of manual toolchain installation, set :file:`ESPRESSIF_TOOLCHAIN_PATH` accordingly.
+   Otherwise, set toolchain path as below. If necessary, update the version folder path as in :file:`esp-2020r3-8.4.0`.
+
+On Linux and macOS:
+
+.. code-block:: console
+
+   export ZEPHYR_TOOLCHAIN_VARIANT="espressif"
+   export ESPRESSIF_TOOLCHAIN_PATH="${HOME}/.espressif/tools/zephyr"
+
+On Windows:
+
+.. code-block:: console
+
+  # on CMD:
+  set ESPRESSIF_TOOLCHAIN_PATH=%USERPROFILE%\.espressif\tools\zephyr
+  set ZEPHYR_TOOLCHAIN_VARIANT=espressif
+
+  # on PowerShell
+  $env:ESPRESSIF_TOOLCHAIN_PATH="$env:USERPROFILE\.espressif\tools\zephyr"
+  $env:ZEPHYR_TOOLCHAIN_VARIANT="espressif"
+
+Finally, retrieve required submodules to build this port. This might take a while for the first time:
+
+.. code-block:: console
+
+   west espressif update
+
+.. note::
+
+    It is recommended running the command above after :file:`west update` so that submodules also get updated.
+
+Flashing
+========
+
+The usual ``flash`` target will work with the ``esp32`` board
+configuration. Here is an example for the :ref:`hello_world`
+application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: esp32_net
+   :goals: flash
+
+Refer to :ref:`build_an_application` and :ref:`application_run` for
+more details.
+
+It's impossible to determine which serial port the ESP32 board is
+connected to, as it uses a generic RS232-USB converter.  The default of
+``/dev/ttyUSB0`` is provided as that's often the assigned name on a Linux
+machine without any other such converters.
+
+The baud rate of 921600bps is recommended.  If experiencing issues when
+flashing, try halving the value a few times (460800, 230400, 115200,
+etc).  It might be necessary to change the flash frequency or the flash
+mode; please refer to the `esptool documentation`_ for guidance on these
+settings.
+
+All flashing options are now handled by the :ref:`west` tool, including flashing
+with custom options such as a different serial port.  The ``west`` tool supports
+specific options for the ESP32 board, as listed here:
+
+  --esp-idf-path ESP_IDF_PATH
+                        path to ESP-IDF
+  --esp-device ESP_DEVICE
+                        serial port to flash, default $ESPTOOL_PORT if defined.
+                        If not, esptool will loop over available serial ports until
+                        it finds ESP32 device to flash.
+  --esp-baud-rate ESP_BAUD_RATE
+                        serial baud rate, default 921600
+  --esp-flash-size ESP_FLASH_SIZE
+                        flash size, default "detect"
+  --esp-flash-freq ESP_FLASH_FREQ
+                        flash frequency, default "40m"
+  --esp-flash-mode ESP_FLASH_MODE
+                        flash mode, default "dio"
+  --esp-tool ESP_TOOL   if given, complete path to espidf. default is to
+                        search for it in [ESP_IDF_PATH]/components/esptool_py/
+                        esptool/esptool.py
+  --esp-flash-bootloader ESP_FLASH_BOOTLOADER
+                        Bootloader image to flash
+  --esp-flash-partition_table ESP_FLASH_PARTITION_TABLE
+                        Partition table to flash
+
+For example, to flash to ``/dev/ttyUSB2``, use the following command after
+having build the application in the ``build`` directory:
+
+
+.. code-block:: console
+
+   west flash -d build/ --skip-rebuild --esp-device /dev/ttyUSB2
+
+References
+**********
+
+.. _`ESP32 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf
+.. _`JTAG debugging for ESP32`: http://esp-idf.readthedocs.io/en/latest/api-guides/jtag-debugging/index.html
+.. _`toolchain`: https://esp-idf.readthedocs.io/en/latest/get-started/index.html#get-started-setup-toochain
+.. _`SDK`: https://esp-idf.readthedocs.io/en/latest/get-started/index.html#get-started-get-esp-idf
+.. _`Hardware Reference`: https://esp-idf.readthedocs.io/en/latest/hw-reference/index.html
+.. _`esptool documentation`: https://github.com/espressif/esptool/blob/master/README.md
+.. _`esptool.py`: https://github.com/espressif/esptool
+.. _`ESP-WROVER-32 V3 Getting Started Guide`: https://dl.espressif.com/doc/esp-idf/latest/get-started/get-started-wrover-kit.html
+.. _`installing prerequisites`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html#step-1-install-prerequisites
+.. _`set up the tools`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html#step-3-set-up-the-tools
+.. _`set up environment variables`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html#step-4-set-up-the-environment-variables
+.. _`ESP32 Toolchain`: https://docs.espressif.com/projects/esp-idf/en/v4.2/esp32/api-guides/tools/idf-tools.html#xtensa-esp32-elf
+.. _`OpenOCD for ESP32 download`: https://docs.espressif.com/projects/esp-idf/en/v4.2/esp32/api-guides/tools/idf-tools.html#openocd-esp32

boards/xtensa/esp32_net/esp32_net.dts

@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/dts-v1/;
+
+#include <espressif/esp32.dtsi>
+
+/ {
+	model = "esp32_net";
+	compatible = "espressif,esp32_net";
+
+	chosen {
+		zephyr,sram = &sram0;
+	};
+};
+
+&cpu0 {
+	clock-frequency = <ESP32_CLK_CPU_240M>;
+};
+
+&cpu1 {
+	clock-frequency = <ESP32_CLK_CPU_240M>;
+};
+
+&trng0 {
+	status = "okay";
+};

boards/xtensa/esp32_net/esp32_net.yaml

@@ -0,0 +1,13 @@
+identifier: esp32_net
+name: ESP32_NET
+type: mcu
+arch: xtensa
+toolchain:
+  - espressif
+supported:
+  - gpio
+  - i2c
+  - watchdog
+  - uart
+  - pinmux
+  - nvs

boards/xtensa/esp32_net/esp32_net_defconfig

@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_XTENSA_RESET_VECTOR=n
+
+CONFIG_BOARD_ESP32_NET=y
+CONFIG_SOC_ESP32_NET=y
+
+CONFIG_MAIN_STACK_SIZE=2048
+
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=240000000
+
+CONFIG_CONSOLE=n
+CONFIG_SERIAL=n
+CONFIG_UART_CONSOLE=n
+
+CONFIG_XTENSA_USE_CORE_CRT1=n
+
+CONFIG_PINMUX=n
+CONFIG_GPIO=n
+CONFIG_GPIO_ESP32=n
+
+CONFIG_GEN_ISR_TABLES=y
+CONFIG_GEN_IRQ_VECTOR_TABLE=n
+
+CONFIG_I2C=n
+CONFIG_CLOCK_CONTROL=y

boards/xtensa/esp32_net/support/openocd.cfg

@@ -0,0 +1,5 @@
+set ESP_RTOS none
+set ESP32_ONLYCPU 1
+
+source [find interface/ftdi/esp32_devkitj_v1.cfg]
+source [find target/esp32.cfg]

cmake/toolchain/espressif/target.cmake

@@ -9,6 +9,7 @@ set(LINKER ld)
 set(BINTOOLS gnu)
 
 set(CROSS_COMPILE_TARGET_xtensa_esp32    xtensa-esp32-elf)
+set(CROSS_COMPILE_TARGET_xtensa_esp32_net  xtensa-esp32-elf)
 set(CROSS_COMPILE_TARGET_xtensa_esp32s2  xtensa-esp32s2-elf)
 set(CROSS_COMPILE_TARGET_riscv_esp32c3   riscv32-esp-elf)
 

soc/xtensa/esp32/Kconfig.soc

@@ -31,14 +31,18 @@ config FLASH_BASE_ADDRESS
 	hex
 	default $(dt_node_reg_addr_hex,/soc/flash-controller@3ff42000/flash@0)
 
+config ESP32_NETWORK_CORE
+	bool "Uses the ESP32 APP_CPU as Network dedicated core"
+
 config ESP32_BT_RESERVE_DRAM
 	hex "Bluetooth controller reserved RAM region"
 	default 0xdb5c if BT
 	default 0
 
 config ESP_HEAP_MEM_POOL_REGION_1_SIZE
 	int "Internal DRAM region 1 mempool size"
-	default 16384
+	default 1024 if ESP32_NETWORK_CORE
+	default 49152
 	help
 	  ESP32 has two banks of size 192K and 128K which can be used
 	  as DRAM, system heap allocates area from region 0.

soc/xtensa/esp32/esp32-mp.c

@@ -60,6 +60,7 @@ extern void z_sched_ipi(void);
  */
 void smp_log(const char *msg)
 {
+#ifndef CONFIG_ESP32_NETWORK_CORE
 	k_spinlock_key_t key = k_spin_lock(&loglock);
 
 	while (*msg) {
@@ -69,6 +70,7 @@ void smp_log(const char *msg)
 	esp_rom_uart_tx_one_char('\n');
 
 	k_spin_unlock(&loglock, key);
+#endif
 }
 
 static void appcpu_entry2(void)
@@ -169,7 +171,7 @@ static void appcpu_entry1(void)
  * calls or registers shown are documented, so treat this code with
  * extreme caution.
  */
-static void appcpu_start(void)
+void esp_appcpu_start(void *entry_point)
 {
 	smp_log("ESP32: starting APPCPU");
 
@@ -193,21 +195,11 @@ static void appcpu_start(void)
 	/* Seems weird that you set the boot address AFTER starting
 	 * the CPU, but this is how they do it...
 	 */
-	esp_rom_ets_set_appcpu_boot_addr((void *)appcpu_entry1);
+	esp_rom_ets_set_appcpu_boot_addr((void *)entry_point);
 
 	smp_log("ESP32: APPCPU start sequence complete");
 }
 
-IRAM_ATTR static inline uint32_t prid(void)
-{
-	uint32_t id;
-
-	__asm__ volatile (
-		"rsr.prid %0\n"
-		"extui %0,%0,13,1" : "=r" (id));
-	return id;
-}
-
 IRAM_ATTR static void esp_crosscore_isr(void *arg)
 {
 	ARG_UNUSED(arg);
@@ -217,7 +209,7 @@ IRAM_ATTR static void esp_crosscore_isr(void *arg)
 	z_sched_ipi();
 #endif
 
-	const int core_id = prid();
+	const int core_id = esp_core_id();
 
 	if (core_id == 0) {
 		DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 0);
@@ -250,7 +242,7 @@ void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
 
 	start_rec = &sr;
 
-	appcpu_start();
+	esp_appcpu_start(appcpu_entry1);
 
 	while (!alive_flag) {
 	}
@@ -275,7 +267,7 @@ void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
 
 void arch_sched_ipi(void)
 {
-	const int core_id = prid();
+	const int core_id = esp_core_id();
 
 	if (core_id == 0) {
 		DPORT_WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, DPORT_CPU_INTR_FROM_CPU_0);