topology: update tplg to main 65e4c1f

update tplg to main 65e4c1f

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>

src/arch/xtensa/configs/override/mt8188_chrome_waves.config

@@ -0,0 +1,2 @@
+CONFIG_COMP_MODULE_ADAPTER=y
+CONFIG_WAVES_CODEC=y

src/include/kernel/tokens.h

@@ -33,6 +33,7 @@
 /* buffers */
 #define SOF_TKN_BUF_SIZE			100
 #define SOF_TKN_BUF_CAPS			101
+#define SOF_TKN_BUF_FLAGS			102
 
 /* DAI */
 /* Token retired with ABI 3.2, do not use for new capabilities

tools/topology/topology1/CMakeLists.txt

@@ -78,6 +78,7 @@ set(TPLGS
 	"sof-mt8186-mt6366\;sof-mt8186-dts\;-DDTS=`DTS'"
 	"sof-mt8186-mt6366\;sof-mt8186-mt6366-rt1019-rt5682s-waves\;-DWAVES=1"
 	"sof-mt8188-mt6359\;sof-mt8188"
+	"sof-mt8188-mt6359\;sof-mt8188-waves\;-DWAVES=1"
 
 	"sof-acp-renoir\;sof-acp"
 	"sof-rn-rt5682-rt1019\;sof-rn-rt5682-rt1019"
@@ -91,6 +92,7 @@ set(TPLGS
 	"sof-acp-rmb\;sof-rmb-rt5682s-rt1019"
 	"sof-acp-rmb\;sof-rmb-nau8825-max98360"
 	"sof-acp_6_3\;sof-acp_6_3"
+	"sof-acp_6_3_sdw\;sof-acp_6_3-rt715-rt711-rt1316"
 )
 
 # This empty 'production/' source subdirectory exists only to create the

tools/topology/topology1/m4/buffer.m4

@@ -5,13 +5,16 @@ dnl Define the macro for buffer widget
 dnl N_BUFFER(name)
 define(`N_BUFFER', `BUF'PIPELINE_ID`.'$1)
 
-dnl W_BUFFER(name, size, capabilities)
+dnl W_BUFFER(name, size, capabilities, [core], [flags])
 define(`W_BUFFER',
 `SectionVendorTuples."'N_BUFFER($1)`_tuples" {'
 `	tokens "sof_buffer_tokens"'
 `	tuples."word" {'
 `		SOF_TKN_BUF_SIZE'	STR($2)
 `		SOF_TKN_BUF_CAPS'	STR($3)
+`ifelse(`$#', `5',
+`		SOF_TKN_BUF_FLAGS'	STR($5)
+,` ')'
 `	}'
 `}'
 `SectionData."'N_BUFFER($1)`_data" {'

tools/topology/topology1/m4/dai.m4

@@ -155,7 +155,7 @@ define(`DO_DAI_CONFIG',
 `'
 `	id		"'$3`"'
 `'
-`	ifelse($1, `SSP', $5, $1, `HDA', $5, $1, `ALH', $5, $1, `ESAI', $5, $1, `SAI', $5, $1, `MICFIL', $5, $1, `AFE', $5, $1, `ACP', $5, $1, `ACPSP', $5, $1,`ACPSP_VIRTUAL', $5, $1, `ACPHS', $5, $1, `ACPHS_VIRTUAL', $5, $1, `ACPDMIC', $5, `}')'
+`	ifelse($1, `SSP', $5, $1, `HDA', $5, $1, `ALH', $5, $1, `ESAI', $5, $1, `SAI', $5, $1, `MICFIL', $5, $1, `AFE', $5, $1, `ACP', $5, $1, `ACPSP', $5, $1,`ACPSP_VIRTUAL', $5, $1, `ACPHS', $5, $1, `ACPHS_VIRTUAL', $5, $1, `ACP_SDW', $5, $1, `ACPDMIC', $5, `}')'
 `ifelse($1, `DMIC', $5, `')'
 `SectionVendorTuples."'N_DAI_CONFIG($1$2)`_tuples_common" {'
 `	tokens "sof_dai_tokens"'

tools/topology/topology1/m4/drc_coef_generic_notebook_speaker.m4

@@ -0,0 +1,22 @@
+# Exported with script example_drc.m 18-Dec-2023
+# cd tools/tune/drc; octave --no-window-system example_drc.m
+CONTROLBYTES_PRIV(DRC_priv,
+`       bytes "0x53,0x4f,0x46,0x00,0x00,0x00,0x00,0x00,'
+`       0x6c,0x00,0x00,0x00,0x00,0xa0,0x01,0x03,'
+`       0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
+`       0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
+`       0x6c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
+`       0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,'
+`       0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,'
+`       0x00,0x00,0x00,0xe7,0x00,0x00,0x00,0x0f,'
+`       0x00,0x00,0x00,0x0a,0xd3,0x4d,0x62,0x00,'
+`       0x0c,0x57,0x99,0x03,0x66,0x66,0x66,0x06,'
+`       0x5c,0xea,0xc1,0x00,0xbf,0x84,0x23,0x00,'
+`       0x03,0x3e,0xd6,0xff,0x4e,0xf4,0x50,0x00,'
+`       0xb6,0xa0,0xb5,0x09,0x4c,0x10,0x61,0x04,'
+`       0x1c,0xc7,0x71,0x00,0x77,0x77,0x77,0xff,'
+`       0xd8,0x77,0x1f,0x00,0x05,0x00,0x00,0x00,'
+`       0x00,0x80,0x43,0x00,0xd7,0x7d,0x04,0x00,'
+`       0xa0,0xce,0x25,0x00,0xd7,0x7d,0x09,0x00,'
+`       0xb1,0xb5,0x00,0x00"'
+)

tools/topology/topology1/platform/common/acp-sdw.m4

@@ -0,0 +1,24 @@
+divert(-1)
+
+dnl ACP_SDW related macros
+
+dnl ACP_CONFIG(format, mclk, bclk, fsync, tdm, sdw_config_data)
+define(`ACP_SDW_CONFIG',
+`}'
+$1
+)
+dnl ACP_SDW_CONFIG_DATA(type, idx, rate, channel)
+define(`ACP_SDW_CONFIG_DATA',
+`SectionVendorTuples."'N_DAI_CONFIG($1$2)`_tuples" {'
+`       tokens "sof_acp_sdw_tokens"'
+`       tuples."word" {'
+`               SOF_TKN_AMD_ACP_SDW_SAMPLERATE'		STR($3)
+`		SOF_TKN_AMD_ACP_SDW_CH'		STR($4)
+`       }'
+`}'
+`SectionData."'N_DAI_CONFIG($1$2)`_data" {'
+`       tuples "'N_DAI_CONFIG($1$2)`_tuples"'
+`}'
+)
+
+divert(0)dnl

tools/topology/topology1/sof-acp_6_3_sdw.m4

@@ -0,0 +1,136 @@
+#Required Topology for RTK Monolithic Aggregated with ACP DMIC Card
+# PCM      Description             DAI LINK      DAI BE
+#  0       HS Playback             0             SDW0-PIN0-Playback-SimpleJack       AUDIO_TX
+#  1       HS Capture              1             SDW0-PIN3-Capture-SimpleJack        AUDIO_RX
+#  2       Speaker playback        2             SDW0-PIN1-Playback-SmartAmp       BT_TX
+#  4       SDW DMIC                4             SDW1-PIN1-Capture-SmartMic        P1_SW_BT RX
+#
+# Topology for Phoenix with soundwire and DMIC.
+#
+
+#
+# Define the pipelines
+#
+# PCM0 ----> buffer ----> AUDIO_TX
+# PCM1 <---- buffer <---- AUDIO_RX
+# PCM2 ----> buffer ----> BT_TX
+# PCM4 <---- buffer <---- P1_SW_BT RX
+
+# Include topology builder
+include(`utils.m4')
+include(`dai.m4')
+include(`pipeline.m4')
+include(`acp-sdw.m4')
+include(`acp-dmic.m4')
+
+# Include TLV library
+include(`common/tlv.m4')
+
+# Include Token library
+include(`sof/tokens.m4')
+
+# Include ACP DSP configuration
+include(`platform/amd/acp.m4')
+
+#/**********************************************************************************/
+# PCM 0, HS Playback, DAI link id 0, Dai index 0(Audio_Tx), BE SW0-PIN0-PLAYBACK
+
+#Driver dai index and dai BE
+#DAI Index(Instance * 64 + base_index)      DAI_BE
+#0(AUDIO_TX)	                            SDW0-PIN0-PLAYBACK-SimpleJack
+#1(BT_TX)	                            SDW0-PIN1-PLAYBACK-SmartAmp
+#2(HS_TX)	                            SDW0-PIN2-PLAYBACK
+#3(AUDIO_RX)	                            SDW0-PIN3-CAPTURE-SimpleJack
+#4(BT_RX)	                            SDW0-PIN4-CAPTURE-SmartAmp
+#5(HS_RX)	                            SDW0-PIN5-CAPTURE
+#
+#65(P1_BT_TX)	                        SDW1-PIN1-PLAYBACK
+#68(P1_BT_RX)	                        SDW1-PIN1-CAPTURE-SmartMic
+
+define(DI_SDW0_ACP_SW_Audio_TX, 0)
+define(DI_SDW0_ACP_SW_BT_TX, 1)
+define(DI_SDW0_ACP_SW_HS_TX, 2)
+define(DI_SDW0_ACP_SW_Audio_RX, 3)
+define(DI_SDW0_ACP_SW_BT_RX, 4)
+define(DI_SDW0_ACP_SW_HS_RX, 5)
+define(DI_SDW1_ACP_P1_SW_BT_RX, 68)
+define(DI_SDW1_ACP_P1_SW_BT_TX, 65)
+
+define(DAI_BE_SDW0_ACP_SW_HS_RX, SDW0-PIN5-CAPTURE)
+define(DAI_BE_SDW0_ACP_SW_HS_TX, SDW0-PIN2-PLAYBACK)
+define(DAI_BE_SDW1_ACP_P1_SW_BT_RX, SDW1-PIN1-CAPTURE-SmartMic)
+define(DAI_BE_SDW1_ACP_P1_SW_BT_TX, SDW1-PIN1-PLAYBACK)
+define(DAI_BE_ACP_SW_Audio_RX, SDW0-PIN3-CAPTURE-SimpleJack)
+define(DAI_BE_SDW0_ACP_SW_Audio_TX, SDW0-PIN0-PLAYBACK-SimpleJack)
+define(DAI_BE_SDW0_ACP_SW_BT_RX, SDW0-PIN4-CAPTURE-SmartAmp)
+define(DAI_BE_SDW0_ACP_SW_BT_TX, SDW0-PIN1-PLAYBACK-SmartAmp)
+
+#pipeline: name of the predefined pipeline
+#pipe id: pipeline ID. This should be a unique ID identifying the pipeline
+#pcm: PCM ID. This will be used to bind to the correct front end DAI link
+PIPELINE_PCM_ADD(sof/pipe-passthrough-playback.m4,
+	 0, 0, 2, s16le,
+ 	2000, 0, 0,
+        48000, 48000, 48000)
+
+#DAI_ADD(pipeline, pipe id, dai type, firmware dai_index, dai_be, buffer)
+DAI_ADD(sof/pipe-dai-playback.m4, 0, ACP_SDW, DI_SDW0_ACP_SW_Audio_TX, DAI_BE_SDW0_ACP_SW_Audio_TX,
+PIPELINE_SOURCE_0, 2, s16le, 2000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
+
+#DAI_CONFIG(type, driver dai_index, link_id, Dai BE name, config)
+DAI_CONFIG(ACP_SDW, DI_SDW0_ACP_SW_Audio_TX, 0, DAI_BE_SDW0_ACP_SW_Audio_TX,
+	   ACP_SDW_CONFIG(ACP_SDW_CONFIG_DATA(ACP_SDW, DI_SDW0_ACP_SW_Audio_TX, 48000, 2)))
+PCM_PLAYBACK_ADD(ACP-SW0-PIN0-Playback-HS, 0, PIPELINE_PCM_0)
+#/**********************************************************************************/
+
+
+#/**********************************************************************************/
+#PCM 1, HS Capture, DAI link id 1, Dai index 3(Audio_RX), BE SW0-PIN0-CAPTURE
+# Capture pipeline 1 on PCM 1 using max 2 channels of s16le.
+PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4,
+        1, 1, 2, s16le,
+        2000, 0, 0,
+        48000, 48000, 48000)
+
+# Capture DAI is ACP soundwire using 2 periods
+DAI_ADD(sof/pipe-dai-capture.m4, 1, ACP_SDW, DI_SDW0_ACP_SW_Audio_RX, DAI_BE_ACP_SW_Audio_RX,
+PIPELINE_SINK_1, 2, s16le, 2000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
+
+DAI_CONFIG(ACP_SDW, DI_SDW0_ACP_SW_Audio_RX, 1, DAI_BE_ACP_SW_Audio_RX,
+	   ACP_SDW_CONFIG(ACP_SDW_CONFIG_DATA(ACP_SDW, DI_SDW0_ACP_SW_Audio_RX, 48000, 2)))
+PCM_CAPTURE_ADD(ACP-SW0-PIN0-Capture-HS, 1, PIPELINE_PCM_1)
+#/**********************************************************************************/
+
+#/**********************************************************************************/
+#PCM 2, Speaker Playback, DAI link id 2, Dai index 1(BT_TX), BE SW0-PIN1-PLAYBACK
+PIPELINE_PCM_ADD(sof/pipe-passthrough-playback.m4,
+	 2, 2, 2, s16le,
+ 	2000, 0, 0,
+        48000, 48000, 48000)
+
+# playback DAI is ACP soundwire using 2 periods
+DAI_ADD(sof/pipe-dai-playback.m4, 2, ACP_SDW, DI_SDW0_ACP_SW_BT_TX, DAI_BE_SDW0_ACP_SW_BT_TX,
+PIPELINE_SOURCE_2, 2, s16le, 2000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
+
+DAI_CONFIG(ACP_SDW, DI_SDW0_ACP_SW_BT_TX, 2, DAI_BE_SDW0_ACP_SW_BT_TX,
+	   ACP_SDW_CONFIG(ACP_SDW_CONFIG_DATA(ACP_SDW, DI_SDW0_ACP_SW_BT_TX, 48000, 2)))
+PCM_PLAYBACK_ADD(ACP-SW0-PIN2-Playback-SPK, 2, PIPELINE_PCM_2)
+#/**********************************************************************************/
+
+#/**********************************************************************************/
+#PCM 4, SDW Capture, DAI link id 4, Dai index 68(P1_BT_RX), BE SW1-PIN1-CAPTURE
+# Capture pipeline 1 on PCM 1 using max 2 channels of s16le.
+PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4,
+        4, 4, 2, s16le,
+        2000, 0, 0,
+        48000, 48000, 48000)
+
+# Capture DAI is ACP soundwire using 2 periods
+DAI_ADD(sof/pipe-dai-capture.m4, 4, ACP_SDW, DI_SDW1_ACP_P1_SW_BT_RX, DAI_BE_SDW1_ACP_P1_SW_BT_RX,
+PIPELINE_SINK_4, 2, s16le, 2000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
+
+DAI_CONFIG(ACP_SDW, DI_SDW1_ACP_P1_SW_BT_RX, 4, DAI_BE_SDW1_ACP_P1_SW_BT_RX,
+	   ACP_SDW_CONFIG(ACP_SDW_CONFIG_DATA(ACP_SDW, DI_SDW1_ACP_P1_SW_BT_RX, 48000, 2)))
+PCM_CAPTURE_ADD(ACP-SW1-PIN1-CAPTURE-DMIC, 4, PIPELINE_PCM_4)
+#/**********************************************************************************/
+

tools/topology/topology1/sof-mt8188-mt6359.m4

@@ -34,19 +34,23 @@ dnl     period, priority, core,
 dnl     pcm_min_rate, pcm_max_rate, pipeline_rate,
 dnl     time_domain, sched_comp)
 
+define(`ENDPOINT_NAME', `Speakers')
 # Low Latency playback pipeline 1 on PCM 16 using max 2 channels of s16le
 # Set 1000us deadline with priority 0 on core 0
-PIPELINE_PCM_ADD(sof/pipe-passthrough-playback.m4,
+PIPELINE_PCM_ADD(ifdef(`WAVES', sof/pipe-waves-codec-playback.m4, sof/pipe-passthrough-playback.m4),
 	1, 16, 2, s16le,
 	1000, 0, 0,
 	48000, 48000, 48000)
+undefine(`ENDPOINT_NAME')
 
+define(`ENDPOINT_NAME', `Headphones')
 # Low Latency playback pipeline 2 on PCM 17 using max 2 channels of s16le
 # Set 1000us deadline with priority 0 on core 0
-PIPELINE_PCM_ADD(sof/pipe-passthrough-playback.m4,
+PIPELINE_PCM_ADD(ifdef(`WAVES', sof/pipe-waves-codec-playback.m4, sof/pipe-passthrough-playback.m4),
 	2, 17, 2, s16le,
 	1000, 0, 0,
 	48000, 48000, 48000)
+undefine(`ENDPOINT_NAME')
 
 # Low Latency capture pipeline 3 on PCM 18 using max 2 channels of s16le
 # Set 2000us deadline with priority 0 on core 0

tools/topology/topology1/sof/pipe-drc-playback.m4

@@ -31,7 +31,7 @@ W_PCM_PLAYBACK(PCM_ID, DRC Playback, 2, 0, SCHEDULE_CORE)
 
 define(DRC_priv, concat(`drc_bytes_', PIPELINE_ID))
 define(MY_DRC_CTRL, concat(`drc_control_', PIPELINE_ID))
-include(`drc_coef_default.m4')
+include(`drc_coef_generic_notebook_speaker.m4')
 C_CONTROLBYTES(MY_DRC_CTRL, PIPELINE_ID,
       CONTROLBYTES_OPS(bytes, 258 binds the control to bytes get/put handlers, 258, 258),
       CONTROLBYTES_EXTOPS(258 binds the control to bytes get/put handlers, 258, 258),

tools/topology/topology1/sof/pipe-volume-capture.m4

@@ -72,10 +72,13 @@ P_GRAPH(pipe-volume-capture, PIPELINE_ID,
 indir(`define', concat(`PIPELINE_SINK_', PIPELINE_ID), N_BUFFER(1))
 indir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID), Passthrough Capture PCM_ID)
 
+ifdef(`CHANNELS_MIN', `define(`LOCAL_CHANNELS_MIN', `CHANNELS_MIN')',
+`define(`LOCAL_CHANNELS_MIN', `2')')
+
 #
 # PCM Configuration
 #
 
 PCM_CAPABILITIES(Passthrough Capture PCM_ID, CAPABILITY_FORMAT_NAME(PIPELINE_FORMAT),
-	PCM_MIN_RATE, PCM_MAX_RATE, PIPELINE_CHANNELS, PIPELINE_CHANNELS,
+	PCM_MIN_RATE, PCM_MAX_RATE, LOCAL_CHANNELS_MIN, PIPELINE_CHANNELS,
 	2, 16, 192, 16384, 65536, 65536)

tools/topology/topology1/sof/tokens.m4

@@ -152,3 +152,8 @@ SectionVendorTokens."sof_micfil_tokens" {
         SOF_TKN_IMX_MICFIL_RATE                  "2000"
         SOF_TKN_IMX_MICFIL_CH                    "2001"
 }
+
+SectionVendorTokens."sof_acp_sdw_tokens" {
+	SOF_TKN_AMD_ACP_SDW_SAMPLERATE		"2100"
+	SOF_TKN_AMD_ACP_SDW_CH			"2101"
+}

tools/topology/topology2/CMakeLists.txt

@@ -3,7 +3,15 @@
 # 3.17 required: foreach(<loop_var>... IN ZIP_LISTS <lists>)
 cmake_minimum_required(VERSION 3.17)
 
-add_custom_target(topologies2)
+add_custom_target(topologies2 ALL
+    # Create directory structure to be provided for deployment
+    COMMAND ${CMAKE_COMMAND} -E make_directory ${CMAKE_CURRENT_BINARY_DIR}/target/sof-ipc4-tplg
+    COMMAND ${CMAKE_COMMAND} -E create_symlink sof-ipc4-tplg ${CMAKE_CURRENT_BINARY_DIR}/target/sof-ace-tplg
+    COMMAND ${CMAKE_COMMAND} -E make_directory ${CMAKE_CURRENT_BINARY_DIR}/target/development
+    # copy the topology files only to target
+    COMMAND ${CMAKE_COMMAND} -E copy_if_different production/*.tplg ${CMAKE_CURRENT_BINARY_DIR}/target/sof-ipc4-tplg/
+    COMMAND ${CMAKE_COMMAND} -E copy_if_different development/*.tplg ${CMAKE_CURRENT_BINARY_DIR}/target/development/
+)
 
 # Check alsatplg version and build topology2 if alsatplg version is
 # 1.2.7 or greater, see https://github.com/thesofproject/sof/issues/5323
@@ -29,7 +37,6 @@ add_custom_target(abi_target
 	DEPENDS abi.conf
 )
 
-add_dependencies(topologies2 topology2_cavs topology2_ace topology2_dev)
-add_subdirectory(avs-tplg)
+add_dependencies(topologies2 topology2_dev topology2_prod)
 add_subdirectory(development)
-add_subdirectory(sof-ace-tplg)
+add_subdirectory(production)