FIx for DP + multicore with IPC4 #4705
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ranj063
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| int j; | ||
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| /* decrement ref count for all cores that were updated previously */ | ||
| for_each_set_bit(j, &spipe->core_mask, sdev->num_cores) { |
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not sure if it would work, but in theory
for_each_set_bit(j, &spipe->core_mask, i + 1) {might work as well?
plbossart
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With IPC4, a pipeline may contain multiple modules in the data processing domain and they can be scheduled to run on different cores. Add a new field in struct snd_sof_pipeline to keep track of all the cores that are associated with the modules in the pipeline. Set the pipeline core mask for IPC3 when initializing the pipeline widget IPC structure. For IPC4, set the core mark when initializing the pipeline widget and initializing processing modules in the data processing domain. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
In the current code, we enable a widget core when it is set up and disable it when it is freed. This is problematic with IPC4 because widget free is essentially a NOP and all widgets are freed in the firmware when the pipeline is deleted. This results in a crash during pipeline deletion when one of it's widgets is scheduled to run on a secondary core and is powered off when widget is freed. So, change the logic to enable all cores needed by all the modules in a pipeline when the pipeline widget is set up and disable them after the pipeline widget is freed. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
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This was referenced Dec 12, 2023
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replacement for #4692