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Ingenic Image Processor
Paul Philippov edited this page Sep 23, 2025
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2 revisions
- for older Ingenic SoC
- 3M @ 30 fps
- Mscaler
- RGB-Sensor
- 3A
- Demosaic
- BLC
- DPC
- LSC
- HDR
- 3D & 2D noise reduction
- YSP etc
- for Ingenic T31
- 5M @ 30 fps
- OSD
- Mscaler
- RGB-Sensor
- 3A
- Demosaic
- BLC
- DPC
- LSC
- 2-frame WDR
- 3D & 2D noise reduction
- YSP etc
- for Ingenic T40
- 4K @ 30 fps
- 2-sensor
- OSD
- Mscaler
- RGB & RGB IR-Sensor
- 3A
- Demosaic
- BLC
- DPC
- LSC
- 2-frame WDR
- LCE
- 3D & 2D noise reduction
- YSP etc
- for Ingenic T32
- 4K @ 30 fps
- Multi-sensor
- 2-frame HDR (Frame & Staggered/DOL)
- Native HDR
- RAW Denoise
- 3D & 2D noise reduction
- Demosaic
- OSD
- Scaler
- RGB IR-Sensor etc
https://en.ingenic.com.cn/technology/id-27.html
Ingenic SoCs use a proprietary ISP (Image Signal Processor) that while grew out of V4L2, doesn't follow standard V4L2 patterns.
Instead of common /dev/video0, /dev/video1 we see Ingenic-specific devices:
-
/dev/isp-m0- ISP control interface -
/dev/tx-isp- Transmit ISP interface -
/dev/tisp- ISP interface -
/dev/framechan0- Frame channel -
/dev/framechan1- Frame channel -
/dev/framechan2- Frame channel
- Wiki Home
- About the Project
- Getting Started
- Supported Cameras
- Configuration
- Integration
- Development