Visual System Integrator is an unique tool for embedded/FPGA development which for the first time makes it possible to develop a full functioning system from prototyping to a working product within the same cockpit.
Visual System Integrator lets you define the topology (components, interfaces and data types) of the entire system using GUI or textually (C++).
An end system may contains multiple CPUs, FPGAs and DSPs spanning across physical machines from multiple vendors with varying toolsets. The generated system provides component/interface level instrumentation, trace and performance matrices out of the box. It enables the System Architects to make informed decisions with real performance and throughput matrices and enables the Product Owners to reduce time-to-market and faster development of new features.
Visual System Integrator has common software interfaces such as TCP/UDP/IP, PCIe, OpenAMP and Xilinx AXI builtin. It provides the entire Vivado IP FPGA catalog as well as supports Verilog/VHDL packaged IPs.
In addition any C/C++, Java or Python code can be effortlessly imported as a Software Component. If the imported code is synthesizable then it can be dragged and dropped between a CPU and an FPGA with zero manual wiring.
Because no system works perfectly the first time, VSI have integrated support for Simulators and Emulators. A component can be dragged inside a Simulator/Emulator, leaving the rest of the system as it is, enabling rapid debugging and tracing.
Visual System Integrator is blurring the line between prototyping in high level languages such as Python and months of effort porting the prototyping into the actual code for the end product. With VSI, the effort spent on prototyping is directly reduced from the end product development. It enables you to spend less time in repetitive tasks such as porting and test-benches and more time developing features and increasing robustness of your product.