[6.4.x] IRGen: fix async typed throws miscompiles on Wasm - #90761
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MaxDesiatov merged 1 commit intoJul 23, 2026
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# Conflicts: # test/Interpreter/async_typed_throws_wasm.swift # Conflicts: # test/stdlib/Result+asyncInit.swift # Conflicts: # test/stdlib/Result+asyncInit.swift
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July 21, 2026 13:22
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Cherry-pick of #89715, merged as 4c99082
Explanation: On wasm32 the WebAssembly backend pads the
swiftselfandswifterrorparameters, which left the indirect typed-error pointer and theswiftself/context slot at different LLVM-IR positions for Thin versus Thick async callers; caller and callee then disagreed on which trailing pointer held the typed-error slot and miscompiled async typed-throws calls (#89155:Result.init(catching:) asynctrapped in a value-witness copy on Wasm).With this change
SignatureExpansion::expandAsyncEntryTypenow emitsaddIndirectThrowingResultbefore theswiftself/context slot, so the trailing pair is always[ind_error, swiftself]and Thin and Thick agree on the position regardless of parameter padding. The result-shape decision moves behind one gate,hasTrailingAsyncErrorContextPair(GenCall.h), consumed by the three sites that read these slots positionally:AsyncCallEmission::setFromCallee,AsyncPartialApplicationForwarderEmission, andAsyncNativeCCEntryPointArgumentEmission::mapAsyncParameters(the last also pre-extracts the witness-method Self/witness-table that trail the pair).Scope: IRGen async typed-throws lowering only; while resulting LLVM IR has different ordering of parameters, non-Wasm native codegen is unchanged.
Risk: Low. Non-Wasm codegen is unchanged (the reorder only moves IR operands;
swiftself/swifterrorstay register-pinned by attribute). The only calling-convention change is on Wasm, which was already miscompiling.Testing: New execution test reproduces #89155 on Wasm; IRGen tests updated to pin the new parameter order.
Issue: #89320, rdar://177615931
Reviewed by: @drexin @kateinoigakukun @rjmccall