Merge pull request #19 from dnorthcote/master

Add ZCU208

Makefile

@@ -1,4 +1,4 @@
-all: rfsoc2x2 rfsoc4x2 zcu111
+all: rfsoc2x2 rfsoc4x2 zcu111 zcu208
 
 rfsoc2x2:
 	$(MAKE) -C boards/RFSoC2x2/rfsoc_sam/
@@ -8,3 +8,6 @@ rfsoc4x2:
 
 zcu111:
 	$(MAKE) -C boards/ZCU111/rfsoc_sam/
+
+zcu208:
+	$(MAKE) -C boards/ZCU208/rfsoc_sam/

README.md

@@ -12,15 +12,19 @@
 </table>
 
 # Spectrum Analyser on PYNQ
-This repository hosts an RFSoC Spectrum Analyser tool compatible with [PYNQ image v2.7](https://github.com/Xilinx/PYNQ/releases) for the ZCU111, RFSoC2x2, and RFSoC4x2 development board.
+This repository is only compatible with [PYNQ images v2.7](https://github.com/Xilinx/PYNQ/releases) and greater for the following RFSoC development boards:
+* [ZCU208](https://www.xilinx.com/products/boards-and-kits/zcu208.html),
+* [ZCU111](https://www.xilinx.com/products/boards-and-kits/zcu111.html),
+* [RFSoC4x2](http://rfsoc-pynq.io/), 
+* [RFSoC2x2](http://rfsoc-pynq.io/).
 
 <p align="center">
   <img src="./demonstration.gif" width="75%" height="75%" />
 </p>
 
 ## Quick Start
 Follow the instructions below to install the Spectrum Analyser now. **You will need to give your board access to the internet**.
-* Power on your RFSoC development board with an SD Card containing a fresh PYNQ v2.7 image.
+* Power on your RFSoC development board with an SD Card containing a fresh PYNQ v2.7 image or greater.
 * Navigate to Jupyter Labs by opening a browser (preferably Chrome) and connecting to `http://<board_ip_address>:9090/lab`.
 * We need to open a terminal in Jupyter Lab. Firstly, open a launcher window as shown in the figure below:
 

boards/RFSoC2x2/rfsoc_sam/drivers/overlay.py

@@ -1,9 +1,9 @@
 __author1__ = 'David Northcote'
 __author2__ = 'Lewis McLaughlin'
 __organisation__ = 'The University of Strathclyde'
-__date__ = '28th June 2022'
+__date__ = '19th May 2023'
 __version_name__ = '<a href="https://www.google.com/search?q=the+cobbler" target="_blank" rel="noopener noreferrer">The Cobbler</a>'
-__version_number__ = '0.4.2'
+__version_number__ = '0.4.3'
 __channels__ = 'Dual-channel'
 __board__ = 'RFSoC2x2'
 __release__ = 'release'

boards/RFSoC4x2/rfsoc_sam/drivers/overlay.py

@@ -1,9 +1,9 @@
 __author1__ = 'David Northcote'
 __author2__ = 'Lewis McLaughlin'
 __organisation__ = 'The University of Strathclyde'
-__date__ = '28th June 2022'
+__date__ = '19th May 2023'
 __version_name__ = '<a href="https://www.google.com/search?q=the+cobbler" target="_blank" rel="noopener noreferrer">The Cobbler</a>'
-__version_number__ = '0.4.2'
+__version_number__ = '0.4.3'
 __channels__ = 'Quad-channel'
 __board__ = 'RFSoC4x2'
 __release__ = 'release'

boards/RFSoC4x2/rfsoc_sam/make_block_design.tcl

@@ -4,7 +4,7 @@ set iprepo_dir ./../../ip/iprepo
 
 # Create project
 create_project ${overlay_name} ./${overlay_name} -part xczu48dr-ffvg1517-2-e
-set_property board_part xilinx.com:rfsoc4x2:part0:1.0 [current_project]
+set_property board_part realdigital.org:rfsoc4x2:part0:1.0 [current_project]
 set_property target_language VHDL [current_project]
 
 # Set IP repository paths

boards/ZCU111/rfsoc_sam/drivers/overlay.py

@@ -1,9 +1,9 @@
 __author1__ = 'David Northcote'
 __author2__ = 'Lewis McLaughlin'
 __organisation__ = 'The University of Strathclyde'
-__date__ = '28th June 2022'
+__date__ = '19th May 2023'
 __version_name__ = '<a href="https://www.google.com/search?q=the+cobbler" target="_blank" rel="noopener noreferrer">The Cobbler</a>'
-__version_number__ = '0.4.2'
+__version_number__ = '0.4.3'
 __channels__ = 'Quad-channel'
 __board__ = 'ZCU111'
 __release__ = 'release'