Update the Strathclyde banner and documentation (#8)

* Update strathclyde banner

* Fix figure typo in ZCU111 notebook

* Add build instructions in readme

* Update system version in readme

* Remove makefile print statements

* Improve readme make instructions

README.md

@@ -1,4 +1,4 @@
-<img src="https://www.strath.ac.uk/media/1newwebsite/webteam/logos/xUoS_Logo_Horizontal.png.pagespeed.ic.M6gv_BmDx1.png" width="350">
+<img src="strathclyde_banner.png" width="100%">
 
 # Spectrum Analyser on PYNQ
 This repository is compatible with [PYNQ image v2.6](https://github.com/Xilinx/PYNQ/releases) for the ZCU111 and RFSoC2x2.
@@ -7,7 +7,7 @@ This repository is compatible with [PYNQ image v2.6](https://github.com/Xilinx/P
   <img src="../master/demonstration.gif" width="663" height="502" />
 <p/>
 
-Currently, this project is in version 0.2. We are working on improving aspects of the hardware design and increasing functionality/programability of the Python overlay. 
+Currently, this project is in version 0.2.1. We are working on improving aspects of the hardware design and increasing functionality/programability of the Python overlay. 
 
 ## Key Features 
 * Up to 2 GHz bandwidth for inspection
@@ -86,5 +86,28 @@ pip3 install git+https://github.com/strath-sdr/rfsoc_sam
 
 Once installation has complete you will find the Spectrum Analyser notebooks in the Jupyter workspace directory. The folder will be named 'spectrum-analyzer'.
 
+## Using the Project Files
+The following software is required to use the project files in this repository.
+- Vivado Design Suite 2020.1
+- System Generator for DSP
+- MATLAB R2020a
+
+### Vivado
+This project can be built with Vivado from the command line. Open Vivado 2020.1 and execute the following into the tcl console:
+```sh
+cd /<repository-location>/boards/<board-name>/rfsoc_sam/
+```
+Now that we have moved into the correct directory, make the Vivado project by running the make commands below sequentially.
+```sh
+make project
+make block_design
+make bitstream_file
+```
+
+Alternatively, you can run the entire project build by executing the following into the tcl console:
+```sh
+make all
+```
+
 ## License 
 [BSD 3-Clause](../../blob/master/LICENSE)

boards/RFSoC2x2/rfsoc_sam/makefile

@@ -2,9 +2,6 @@ overlay_name := rfsoc_sam
 design_name := block_design
 
 all: project block_design bitstream_file
-	@echo
-	@tput setaf 2 ; "Built $(overlay_name) successfully!"; tput sgr0;
-	@echo
 
 project:
 	vivado -mode batch -source make_project.tcl -notrace

boards/RFSoC2x2/rfsoc_sam/notebooks/rfsoc_spectrum_analysis.ipynb

@@ -4,7 +4,7 @@
    "cell_type": "markdown",
    "metadata": {},
    "source": [
-    "<img src=\"images/strath_banner.png\" width=\"350\" align=\"left\">"
+    "<img src=\"images/strathclyde_banner.png\" width=\"50%\" align=\"left\">"
    ]
   },
   {
@@ -251,4 +251,4 @@
  },
  "nbformat": 4,
  "nbformat_minor": 4
-}
+}

boards/RFSoC2x2/rfsoc_sam/notebooks/voila_rfsoc_spectrum_analyzer.ipynb

@@ -8,7 +8,7 @@
     ]
    },
    "source": [
-    "<img src=\"images/strath_banner.png\" width=\"350\" align=\"left\">"
+    "<img src=\"images/strathclyde_banner.png\" width=\"50%\" align=\"left\">"
    ]
   },
   {
@@ -183,4 +183,4 @@
  },
  "nbformat": 4,
  "nbformat_minor": 4
-}
+}

boards/ZCU111/rfsoc_sam/makefile

@@ -2,9 +2,6 @@ overlay_name := rfsoc_sam
 design_name := block_design
 
 all: project block_design bitstream_file
-	@echo
-	@tput setaf 2 ; "Built $(overlay_name) successfully!"; tput sgr0;
-	@echo
 
 project:
 	vivado -mode batch -source make_project.tcl -notrace

boards/ZCU111/rfsoc_sam/notebooks/rfsoc_spectrum_analysis.ipynb

@@ -4,7 +4,7 @@
    "cell_type": "markdown",
    "metadata": {},
    "source": [
-    "<img src=\"images/strath_banner.png\" width=\"350\" align=\"left\">"
+    "<img src=\"images/strathclyde_banner.png\" width=\"50%\" align=\"left\">"
    ]
   },
   {
@@ -69,7 +69,7 @@
    "metadata": {},
    "source": [
     "### Hardware Setup <a class=\"anchor\" id=\"hardware-setup\"></a>\n",
-    "Your ZCU111 development board can host four Spectrum Analyzer Modules. To setup your board for this demonstration, you can connect each channel in loopback as shown in [Figure 1](#fig-1), or connect an antenna to one of the ADC channels.\n",
+    "Your ZCU111 development board can host four Spectrum Analyzer Modules. To setup your board for this demonstration, you can connect each channel in loopback as shown in [Figure 2](#fig-2), or connect an antenna to one of the ADC channels.\n",
     "\n",
     "Don't worry if you don't have an antenna. The default loopback configuration will still be very interesting and is connected as follows:\n",
     "* Channel 0: DAC4 (Tile 229 Block 0) to ADC0 (Tile 224 Block 0)\n",
@@ -79,10 +79,10 @@
     "\n",
     "There has been several XM500 board revisions, and some contain different silkscreen and labels for the ADCs and DACs. Use the image below for further guidance and pay attention to the associated Tile and Block.\n",
     "\n",
-    "<a class=\"anchor\" id=\"fig-1\"></a>\n",
+    "<a class=\"anchor\" id=\"fig-2\"></a>\n",
     "<figure>\n",
     "<img src='images/zcu111_setup.png' height='50%' width='50%'/>\n",
-    "    <figcaption><b>Figure 1: ZCU111 and XM500 development board setup in loopback mode.</b></figcaption>\n",
+    "    <figcaption><b>Figure 2: ZCU111 and XM500 development board setup in loopback mode.</b></figcaption>\n",
     "</figure>\n",
     "\n",
     "If you have chosen to use an antenna, **do not** attach your antenna to any SMA interfaces labelled DAC.\n",

boards/ZCU111/rfsoc_sam/notebooks/voila_rfsoc_spectrum_analyzer.ipynb

@@ -8,7 +8,7 @@
     ]
    },
    "source": [
-    "<img src=\"images/strath_banner.png\" width=\"350\" align=\"left\">"
+    "<img src=\"images/strathclyde_banner.png\" width=\"50%\" align=\"left\">"
    ]
   },
   {