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riscv: rename to riscv64
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The only currently supported RISC-V architecture is the 64-bit RISC-V.
As the generic name we use causes confusion [1], rename it to riscv64.

[1] https://lists.strace.io/pipermail/strace-devel/2019-August/009057.html

* Makefile.am (EXTRA_DIST): Rename linux/riscv to linux/riscv64.
* configure.ac: Rename riscv to riscv64, RISCV to RISCV64.
* linux/riscv: Rename to linux/riscv64.
* riscv.c: Rename RISCV to RISCV64.
* tests/options-syntax.test: Rename riscv to riscv64.
* tests/qualify_personality.sh: Likewise.
* tests/strace-V.test: Likewise.
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ldv-alt committed Sep 23, 2019
1 parent 91fbffc commit 69ff62e
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Showing 21 changed files with 25 additions and 25 deletions.
30 changes: 15 additions & 15 deletions Makefile.am
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Expand Up @@ -739,21 +739,21 @@ EXTRA_DIST = \
linux/powerpc64le/userent.h \
linux/ptrace_pokeuser.c \
linux/raw_syscall.h \
linux/riscv/arch_defs_.h \
linux/riscv/arch_get_personality.c \
linux/riscv/arch_regs.c \
linux/riscv/get_error.c \
linux/riscv/get_scno.c \
linux/riscv/get_syscall_args.c \
linux/riscv/ioctls_arch0.h \
linux/riscv/ioctls_arch1.h \
linux/riscv/ioctls_inc0.h \
linux/riscv/ioctls_inc1.h \
linux/riscv/raw_syscall.h \
linux/riscv/set_error.c \
linux/riscv/set_scno.c \
linux/riscv/syscallent.h \
linux/riscv/syscallent1.h \
linux/riscv64/arch_defs_.h \
linux/riscv64/arch_get_personality.c \
linux/riscv64/arch_regs.c \
linux/riscv64/get_error.c \
linux/riscv64/get_scno.c \
linux/riscv64/get_syscall_args.c \
linux/riscv64/ioctls_arch0.h \
linux/riscv64/ioctls_arch1.h \
linux/riscv64/ioctls_inc0.h \
linux/riscv64/ioctls_inc1.h \
linux/riscv64/raw_syscall.h \
linux/riscv64/set_error.c \
linux/riscv64/set_scno.c \
linux/riscv64/syscallent.h \
linux/riscv64/syscallent1.h \
linux/rt_sigframe.h \
linux/s390/arch_defs_.h \
linux/s390/arch_regs.c \
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8 changes: 4 additions & 4 deletions configure.ac
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Expand Up @@ -143,9 +143,9 @@ powerpc*)
esac
fi
;;
riscv*)
arch=riscv
AC_DEFINE([RISCV], 1, [Define for the RISC-V architecture])
riscv64*)
arch=riscv64
AC_DEFINE([RISCV64], 1, [Define for the RISC-V 64-bit architecture])
;;
s390)
arch=s390
Expand Down Expand Up @@ -949,7 +949,7 @@ AC_ARG_ENABLE([mpers],
esac],
[enable_mpers=yes])

st_MPERS([m32], [aarch64|powerpc64|riscv|s390x|sparc64|tile|x32|x86_64])
st_MPERS([m32], [aarch64|powerpc64|riscv64|s390x|sparc64|tile|x32|x86_64])
st_MPERS([mx32], [x86_64])

AX_VALGRIND_DFLT([sgcheck], [off])
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@@ -1 +1 @@
/* Generated by ioctls_gen.sh from definitions found in $linux/arch/riscv/include/ tree. */
/* Generated by ioctls_gen.sh from definitions found in $linux/arch/riscv64/include/ tree. */
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4 changes: 2 additions & 2 deletions riscv.c
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Expand Up @@ -9,7 +9,7 @@

#include "defs.h"

#ifdef RISCV
#ifdef RISCV64

# include "xlat/riscv_flush_icache_flags.h"

Expand All @@ -30,4 +30,4 @@ SYS_FUNC(riscv_flush_icache)
return RVAL_DECODED;
}

#endif /* RISCV */
#endif /* RISCV64 */
2 changes: 1 addition & 1 deletion tests/options-syntax.test
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Expand Up @@ -59,7 +59,7 @@ x32)
check_h "must have PROG [ARGS] or -p PID" -e trace=getcwd@32
check_h "must have PROG [ARGS] or -p PID" -e trace=getcwd@x32
;;
aarch64|powerpc64|riscv|s390x|sparc64|tile)
aarch64|powerpc64|riscv64|s390x|sparc64|tile)
check_h "must have PROG [ARGS] or -p PID" -e trace=getcwd@64
check_h "must have PROG [ARGS] or -p PID" -e trace=getcwd@32
check_h "incorrect personality designator 'x32' in qualification 'getcwd@x32'" -e trace=getcwd@x32
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2 changes: 1 addition & 1 deletion tests/qualify_personality.sh
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Expand Up @@ -25,7 +25,7 @@ x86_64)
x32)
supported_pers='x32 32'
;;
aarch64|powerpc64|riscv|s390x|sparc64|tile)
aarch64|powerpc64|riscv64|s390x|sparc64|tile)
supported_pers='64 32'
;;
*)
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2 changes: 1 addition & 1 deletion tests/strace-V.test
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Expand Up @@ -49,7 +49,7 @@ x86_64)
option_m32=$(getoption HAVE_M32_MPERS ' m32-mpers' ' no-m32-mpers')
option_mx32=$(getoption HAVE_MX32_MPERS ' mx32-mpers' ' no-mx32-mpers')
;;
aarch64|powerpc64|riscv|s390x|sparc64|tile|x32)
aarch64|powerpc64|riscv64|s390x|sparc64|tile|x32)
option_m32=$(getoption HAVE_M32_MPERS ' m32-mpers' ' no-m32-mpers')
;;
esac
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