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Apr 17, 2021
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66047f8
[variant] Group each variant per STM32 series
fpistm Jun 5, 2020
c64a09c
[PIO] Fix variants path changes
fpistm Jul 10, 2020
7011b58
[ThunderPack] Split variant per series
fpistm Jul 16, 2020
99c49a2
Rename PinMap_PWM to PinMap_TIM
fpistm Dec 6, 2020
7469071
Extend Arduino pin naming to the max possibilities
fpistm Dec 5, 2020
4afab84
Clean up old way to define Ax pins definition
fpistm Dec 5, 2020
0a7489d
Introduce all alternative pins per peripheral
fpistm Aug 24, 2020
ff7f85e
Rework analog pin management
fpistm Jan 29, 2021
ac2d9cc
Change Ax constants to an enum
fpistm Jan 25, 2021
0898a85
Remap pin management
fpistm Dec 8, 2020
71108a3
Add Alternate pins (ALTx) management
fpistm Jan 8, 2021
0cafa3c
Definition and comments improvements for pins management
fpistm Jan 25, 2021
da7ef68
Move genpinmap from Arduino_Tools repository
fpistm Feb 19, 2021
e4edbf4
[stm32variant] Update to generate in the core
fpistm Feb 19, 2021
49a09e9
[stm32variant] Use Mcu description
fpistm Feb 19, 2021
4fae0c7
[stm32variant] Add board_entry.txt
fpistm Feb 19, 2021
8ff95b8
[stm32variant] Add option to generate only one family
fpistm Feb 22, 2021
e6ac2bd
[stm32variant] Aggregate generated variant if they are the same
fpistm Mar 1, 2021
66d6408
[stm32variant] Add generic_clock.c generation
fpistm Feb 24, 2021
4fbc7c7
[stm32variant] Comment option to generate from one mcu file
fpistm Mar 8, 2021
677c076
Allow use of a custom peripheral pins file
fpistm Feb 24, 2021
abf08af
[CI] arduino-builder is replaced by arduino-cli
fpistm Mar 9, 2021
d046589
[stm32variant] Change generic variant generation
fpistm Mar 10, 2021
d2674fd
[stm32variant] Fix USB mode when AF is not none
fpistm Mar 27, 2021
cfd7cff
[stm32variant] Rework dirname aggregation
fpistm Mar 30, 2021
0b4c5f7
[stm32variant] Fix ALTx issue with remapped pins
fpistm Apr 8, 2021
b4cdfc8
[stm32variant] Fix AFIO definition for F1
fpistm Apr 8, 2021
8366f41
[stm32variant] Add a README.md
fpistm Apr 15, 2021
20e6e72
[stm32variant] Rename ND by PNUM_NOT_DEFINED
fpistm Apr 15, 2021
b5662d7
Add all generated STM32F0xx generic variant files
fpistm Apr 7, 2021
6b2b23d
Add all generated STM32F1xx generic variant files
fpistm Apr 7, 2021
b78ebe7
Add all generated STM32F2xx generic variant files
fpistm Apr 7, 2021
e0cfa88
Add all generated STM32F3xx generic variant files
fpistm Apr 7, 2021
046afd7
Add all generated STM32F4xx generic variant files
fpistm Apr 7, 2021
0b3dac6
Add all generated STM32F7xx generic variant files
fpistm Apr 7, 2021
4d23012
Add all generated STM32G0xx generic variant files
fpistm Apr 7, 2021
ec30479
Add all generated STM32G4xx generic variant files
fpistm Apr 7, 2021
2f7d688
Add all generated STM32H7xx generic variant files
fpistm Apr 7, 2021
e0157b7
Add all generated STM32L0xx generic variant files
fpistm Apr 7, 2021
b9e45d1
Add all generated STM32L1xx generic variant files
fpistm Apr 7, 2021
f1685bd
Add all generated STM32L4xx generic variant files
fpistm Apr 7, 2021
b04d918
Add all generated STM32L5xx generic variant files
fpistm Apr 7, 2021
7c2fddd
Add all generated STM32MP1xx generic variant files
fpistm Apr 7, 2021
f3f7c43
Add all generated STM32WBxx generic variant files
fpistm Apr 7, 2021
d71f287
Add all generated STM32WLxx generic variant files
fpistm Apr 7, 2021
7a95366
Update variant header management
fpistm Mar 11, 2021
d61905e
[variant] Add Generic L4xx
fpistm Apr 6, 2021
24c724a
[variant] Add Generic G4xx
ABOSTM Apr 7, 2021
55c761f
[variant] Add support of board B-G431B-ESC1
owennewo Mar 23, 2021
606b131
[variant] Add Generic G0xx
fpistm Apr 7, 2021
2a78e9d
Add Aurora One Variant
jhleekr Sep 15, 2020
cfd0b17
Add Nucleo G031K8 and generic G031Kx
fpistm Mar 15, 2021
503f79e
[variant] Update Generic F0xx
fpistm Jan 22, 2021
9234b65
Add Generic F042Cx
seeers Mar 10, 2021
6a45026
Added NUCLEO_F070RB
gbmhunter Sep 10, 2020
51b7236
[variant] Update Generic MP1xx
fpistm Jan 27, 2021
db9b6ed
[variant] Add Generic F2xx
fpistm Mar 14, 2021
b20c5ed
[variant] Add Generic L5xx and Nucleo L552ZE-Q
fpistm Mar 14, 2021
1920959
[variant] Add Generic WBxx
fpistm Mar 14, 2021
5bd495f
[variant] Add Generic L1xx
fpistm Mar 15, 2021
4f033ba
[variant] Update Generic H7xx
fpistm Mar 15, 2021
f79a926
Added Generic H743Vx
vladkozlov69 Sep 25, 2020
30ddea4
Enable HAL MDMA by default
fpistm Mar 16, 2021
7a3a084
[variant] Add Generic F7xx
ABOSTM Mar 16, 2021
d3438df
[variant] Add Generic L0xx
ABOSTM Mar 18, 2021
2315591
Add Generic L010RB
mkals Mar 23, 2021
87bb2ed
[variant] Add Generic F3xx
ABOSTM Mar 23, 2021
f4d5b62
[Variant] Add DISCO F303VC
dnandha Mar 25, 2021
0bc6d02
[Variant] Add OLIMEXINO-STM32F3
Stanimir-Petev Mar 25, 2021
51e9a15
[variant] Add Generic F4xx
ABOSTM Mar 26, 2021
0496974
BlackPill F401CC: add USER_BTN on PA0
ABOSTM Apr 2, 2021
9207aaa
[variant] Add STM32F407ZGT6 Mini and Generic_F407Zx
dds90 Apr 2, 2021
7582527
BLACK_F407ZX: invert PF9 and PF10 in digitalPin[]
ABOSTM Apr 6, 2021
f17e7be
[variant] Add Generic F1xx
ABOSTM Apr 9, 2021
6a94738
[variant] Add Generic F100Cx
mcer12 Apr 13, 2021
cbbb14c
[PIO]Fix variant header and path changes
fpistm Mar 12, 2021
1e38015
[CI] Update configuration to build only one generic per variant
fpistm Mar 16, 2021
ba52cf2
[variant] Remove board_template
fpistm Apr 15, 2021
088209c
Group system IP clock enable in separate function called at init
ABOSTM Apr 16, 2021
f8ddc9c
Manage dualpad analog switch
ABOSTM Apr 16, 2021
7ec57a1
[CI] Update core configuration
fpistm Apr 15, 2021
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Add all generated STM32L0xx generic variant files
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
  • Loading branch information
fpistm committed Apr 15, 2021
commit e0157b722d47f86cd82b45f041b930d15ad2c384
201 changes: 201 additions & 0 deletions variants/STM32L0xx/L010C6T/PeripheralPins.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,201 @@
/*
*******************************************************************************
* Copyright (c) 2020-2021, STMicroelectronics
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
*******************************************************************************
*/
/*
* Automatically generated from STM32L010C6Tx.xml
* CubeMX DB release 6.0.21
*/
#if !defined(CUSTOM_PERIPHERAL_PINS)
#include "Arduino.h"
#include "PeripheralPins.h"

/* =====
* Notes:
* - The pins mentioned Px_y_ALTz are alternative possibilities which use other
* HW peripheral instances. You can use them the same way as any other "normal"
* pin (i.e. analogWrite(PA7_ALT1, 128);).
*
* - Commented lines are alternative possibilities which are not used per default.
* If you change them, you will have to know what you do
* =====
*/

//*** ADC ***

#ifdef HAL_ADC_MODULE_ENABLED
WEAK const PinMap PinMap_ADC[] = {
{PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC_IN0
{PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC_IN1
{PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC_IN2
{PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC_IN3
{PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC_IN4
{PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC_IN5
{PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC_IN6
{PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC_IN7
{PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC_IN8
{PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC_IN9
{NC, NP, 0}
};
#endif

//*** No DAC ***

//*** I2C ***

#ifdef HAL_I2C_MODULE_ENABLED
WEAK const PinMap PinMap_I2C_SDA[] = {
{PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
{PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
{PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
{NC, NP, 0}
};
#endif

#ifdef HAL_I2C_MODULE_ENABLED
WEAK const PinMap PinMap_I2C_SCL[] = {
{PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
{PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)},
{PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
{NC, NP, 0}
};
#endif

//*** TIM ***

#ifdef HAL_TIM_MODULE_ENABLED
WEAK const PinMap PinMap_TIM[] = {
{PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1
{PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3
{PA_2_ALT1, TIM21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM21, 1, 0)}, // TIM21_CH1
{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4
{PA_3_ALT1, TIM21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM21, 2, 0)}, // TIM21_CH2
{PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM2, 1, 0)}, // TIM2_CH1
{PA_8, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM2, 1, 0)}, // TIM2_CH1
{PA_11, TIM21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM21, 2, 0)}, // TIM21_CH2
{PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM2, 1, 0)}, // TIM2_CH1
{PB_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM2, 3, 0)}, // TIM2_CH3
{PB_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM2, 4, 0)}, // TIM2_CH4
{PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
{PB_6, TIM21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM21, 1, 0)}, // TIM21_CH1
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3
{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4
{PB_13, TIM21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM21, 1, 0)}, // TIM21_CH1
{PB_14, TIM21, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM21, 2, 0)}, // TIM21_CH2
{NC, NP, 0}
};
#endif

//*** UART ***

#ifdef HAL_UART_MODULE_ENABLED
WEAK const PinMap PinMap_UART_TX[] = {
{PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{PA_2_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PA_9, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PA_14, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{PA_14_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PB_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART2)},
{PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{NC, NP, 0}
};
#endif

#ifdef HAL_UART_MODULE_ENABLED
WEAK const PinMap PinMap_UART_RX[] = {
{PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{PA_3_ALT1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PA_10, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PA_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PB_7, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART2)},
{PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{NC, NP, 0}
};
#endif

#ifdef HAL_UART_MODULE_ENABLED
WEAK const PinMap PinMap_UART_RTS[] = {
{PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PA_12, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PB_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_LPUART1)},
{PB_14, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{NC, NP, 0}
};
#endif

#ifdef HAL_UART_MODULE_ENABLED
WEAK const PinMap PinMap_UART_CTS[] = {
{PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_LPUART1)},
{PA_7, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PA_11, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART2)},
{PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{NC, NP, 0}
};
#endif

//*** SPI ***

#ifdef HAL_SPI_MODULE_ENABLED
WEAK const PinMap PinMap_SPI_MOSI[] = {
{PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{PB_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI1)},
{PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{PB_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{NC, NP, 0}
};
#endif

#ifdef HAL_SPI_MODULE_ENABLED
WEAK const PinMap PinMap_SPI_MISO[] = {
{PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI1)},
{PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{PB_14, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{NC, NP, 0}
};
#endif

#ifdef HAL_SPI_MODULE_ENABLED
WEAK const PinMap PinMap_SPI_SCLK[] = {
{PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{PB_13, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{NC, NP, 0}
};
#endif

#ifdef HAL_SPI_MODULE_ENABLED
WEAK const PinMap PinMap_SPI_SSEL[] = {
{PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{PB_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)},
{NC, NP, 0}
};
#endif

//*** No CAN ***

//*** No ETHERNET ***

//*** No QUADSPI ***

//*** No USB ***

//*** No SD ***

#endif /* !CUSTOM_PERIPHERAL_PINS */
32 changes: 32 additions & 0 deletions variants/STM32L0xx/L010C6T/PinNamesVar.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,32 @@
/* Alternate pin name */
PA_2_ALT1 = PA_2 | ALT1,
PA_3_ALT1 = PA_3 | ALT1,
PA_14_ALT1 = PA_14 | ALT1,

/* SYS_WKUP */
#ifdef PWR_WAKEUP_PIN1
SYS_WKUP1 = PA_0,
#endif
#ifdef PWR_WAKEUP_PIN2
SYS_WKUP2 = PC_13,
#endif
#ifdef PWR_WAKEUP_PIN3
SYS_WKUP3 = PA_2,
#endif
#ifdef PWR_WAKEUP_PIN4
SYS_WKUP4 = NC,
#endif
#ifdef PWR_WAKEUP_PIN5
SYS_WKUP5 = NC,
#endif
#ifdef PWR_WAKEUP_PIN6
SYS_WKUP6 = NC,
#endif
#ifdef PWR_WAKEUP_PIN7
SYS_WKUP7 = NC,
#endif
#ifdef PWR_WAKEUP_PIN8
SYS_WKUP8 = NC,
#endif

/* No USB */
13 changes: 13 additions & 0 deletions variants/STM32L0xx/L010C6T/boards_entry.txt
Original file line number Diff line number Diff line change
@@ -0,0 +1,13 @@
# This file help to add generic board entry.
# upload.maximum_size and product_line have to be verified
# and changed if needed.
# See: https://github.com/stm32duino/wiki/wiki/Add-a-new-variant-%28board%29

# Generic L010C6Tx
GenL0.menu.pnum.GENERIC_L010C6TX=Generic L010C6Tx
GenL0.menu.pnum.GENERIC_L010C6TX.upload.maximum_size=32768
GenL0.menu.pnum.GENERIC_L010C6TX.upload.maximum_data_size=8192
GenL0.menu.pnum.GENERIC_L010C6TX.build.board=GENERIC_L010C6TX
GenL0.menu.pnum.GENERIC_L010C6TX.build.product_line=STM32L010x6
GenL0.menu.pnum.GENERIC_L010C6TX.build.variant=STM32L0xx/L010C6T

27 changes: 27 additions & 0 deletions variants/STM32L0xx/L010C6T/generic_clock.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
/*
*******************************************************************************
* Copyright (c) 2020-2021, STMicroelectronics
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
*******************************************************************************
*/
#if defined(ARDUINO_GENERIC_L010C6TX)
#include "pins_arduino.h"

/**
* @brief System Clock Configuration
* @param None
* @retval None
*/
WEAK void SystemClock_Config(void)
{
/* SystemClock_Config can be generated by STM32CubeMX */
#warning "SystemClock_Config() is empty. Default clock at reset is used."
}

#endif /* ARDUINO_GENERIC_* */
72 changes: 72 additions & 0 deletions variants/STM32L0xx/L010C6T/variant_generic.cpp
Original file line number Diff line number Diff line change
@@ -0,0 +1,72 @@
/*
*******************************************************************************
* Copyright (c) 2020-2021, STMicroelectronics
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
*******************************************************************************
*/
#if defined(ARDUINO_GENERIC_L010C6TX)
#include "pins_arduino.h"

// Digital PinName array
const PinName digitalPin[] = {
PA_0, // D1/A0
PA_1, // D2/A1
PA_2, // D3/A2
PA_3, // D4/A3
PA_4, // D5/A4
PA_5, // D6/A5
PA_6, // D7/A6
PA_7, // D8/A7
PA_8, // D9
PA_9, // D10
PA_10, // D11
PA_11, // D12
PA_12, // D13
PA_13, // D14
PA_14, // D15
PA_15, // D16
PB_0, // D17/A8
PB_1, // D18/A9
PB_2, // D19
PB_3, // D20
PB_4, // D21
PB_5, // D22
PB_6, // D23
PB_7, // D24
PB_8, // D25
PB_9, // D26
PB_10, // D27
PB_11, // D28
PB_12, // D29
PB_13, // D30
PB_14, // D31
PB_15, // D32
PC_0, // D33
PC_13, // D34
PC_14, // D35
PC_15, // D36
PH_0, // D37
PH_1 // D38
};

// Analog (Ax) pin number array
const uint32_t analogInputPin[] = {
0, // A0, PA0
1, // A1, PA1
2, // A2, PA2
3, // A3, PA3
4, // A4, PA4
5, // A5, PA5
6, // A6, PA6
7, // A7, PA7
16, // A8, PB0
17 // A9, PB1
};

#endif /* ARDUINO_GENERIC_* */
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