Support for writing option bytes on STM32F0/F1/F3 #1112

2a17 · 2021-03-22T21:49:37Z

Implementation to write option bytes for STM32F0/F1/F3.

(Closes #346, Closes #458, Closes #808, Closes #1084)

2a17 · 2021-03-22T21:58:11Z

debug log:

./build/Release/bin/st-flash --debug --area=option write 0x00ff55a0

st-flash 1.6.1-216-gcc9bedd-dirty
2021-03-15T21:27:21 DEBUG common.c: *** looking up stlink version
2021-03-15T21:27:21 DEBUG common.c: st vid = 0x0483 (expect 0x0483)
2021-03-15T21:27:21 DEBUG common.c: stlink pid = 0x374b
2021-03-15T21:27:21 DEBUG common.c: stlink version = 0x2
2021-03-15T21:27:21 DEBUG common.c: jtag version = 0x19
2021-03-15T21:27:21 DEBUG common.c: swim version = 0xd
2021-03-15T21:27:21 DEBUG common.c: stlink current mode: mass
2021-03-15T21:27:21 DEBUG usb.c: JTAG/SWD freq set to 0
2021-03-15T21:27:21 DEBUG common.c: *** set_swdclk ***
2021-03-15T21:27:21 DEBUG common.c: stlink current mode: mass
2021-03-15T21:27:21 DEBUG common.c: *** stlink_enter_swd_mode ***
2021-03-15T21:27:21 DEBUG common.c: *** stlink_jtag_reset ***
2021-03-15T21:27:21 DEBUG common.c: *** stlink_reset ***
2021-03-15T21:27:21 DEBUG common.c: Loading device parameters....
2021-03-15T21:27:21 DEBUG common.c: *** stlink_core_id ***
2021-03-15T21:27:21 DEBUG common.c: core_id = 0x0bb11477
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0xe0042000
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x5c001000
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0x20006440 at 0x40015800
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0xffff0040 at 0x1ffff7cc
2021-03-15T21:27:21 INFO common.c: F0xx: 8 KiB SRAM, 64 KiB flash in at least 1 KiB pages.
2021-03-15T21:27:21 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-03-15T21:27:21 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-03-15T21:27:21 DEBUG common.c: *** stlink_force_debug_mode ***
2021-03-15T21:27:21 DEBUG common.c: *** stlink_status ***
2021-03-15T21:27:21 DEBUG usb.c: core status: 01030003
2021-03-15T21:27:21 DEBUG common.c: core status: halted
2021-03-15T21:27:21 WARN common.c: About to write option byte 0xff55a0 to 0x1ffff800.
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0x00000020 at 0x4002200c
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x40022010
2021-03-15T21:27:21 DEBUG common.c: Successfully unlocked flash
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x40022010
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0x45670123 to 0x40022004
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0xcdef89ab to 0x40022004
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0x45670123 to 0x40022008
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0xcdef89ab to 0x40022008
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0x00000200 at 0x40022010
2021-03-15T21:27:21 DEBUG common.c: Successfully unlocked flash option
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0x00000020 at 0x4002200c
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0x00000200 at 0x40022010
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0x00000210 to 0x40022010
2021-03-15T21:27:21 WARN common.c: Writing option bytes 0xff55a0 to 0x1ffff800
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0x00ff55a0 to 0x1ffff800
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0x00ff55a0 at 0x4002200c
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0x00000020 at 0x4002200c
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0x00000210 at 0x40022010
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0x00002210 to 0x40022010
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x4002200c
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x40022010
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0000000000 to 0x40022010
2021-03-15T21:27:21 INFO common.c: Wrote 4 option bytes to 0x1ffff800!
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x40022010
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0000000000 to 0x40022010
2021-03-15T21:27:21 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x40022010
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0x00000080 to 0x40022010
2021-03-15T21:27:21 DEBUG common.c: *** stlink_exit_debug_mode ***
2021-03-15T21:27:21 DEBUG common.c: *** stlink_write_debug32 0xa05f0000 to 0xe000edf0
2021-03-15T21:27:21 DEBUG common.c: *** stlink_close ***

read again:
st-flash 1.6.1-216-gcc9bedd-dirty
2021-03-15T21:27:26 DEBUG common.c: *** looking up stlink version
2021-03-15T21:27:26 DEBUG common.c: st vid = 0x0483 (expect 0x0483)
2021-03-15T21:27:26 DEBUG common.c: stlink pid = 0x374b
2021-03-15T21:27:26 DEBUG common.c: stlink version = 0x2
2021-03-15T21:27:26 DEBUG common.c: jtag version = 0x19
2021-03-15T21:27:26 DEBUG common.c: swim version = 0xd
2021-03-15T21:27:26 DEBUG common.c: stlink current mode: mass
2021-03-15T21:27:26 DEBUG usb.c: JTAG/SWD freq set to 0
2021-03-15T21:27:26 DEBUG common.c: *** set_swdclk ***
2021-03-15T21:27:26 DEBUG common.c: stlink current mode: mass
2021-03-15T21:27:26 DEBUG common.c: *** stlink_enter_swd_mode ***
2021-03-15T21:27:26 DEBUG common.c: *** stlink_jtag_reset ***
2021-03-15T21:27:27 DEBUG common.c: *** stlink_reset ***
2021-03-15T21:27:27 DEBUG common.c: Loading device parameters....
2021-03-15T21:27:27 DEBUG common.c: *** stlink_core_id ***
2021-03-15T21:27:27 DEBUG common.c: core_id = 0x0bb11477
2021-03-15T21:27:27 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0xe0042000
2021-03-15T21:27:27 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x5c001000
2021-03-15T21:27:27 DEBUG common.c: *** stlink_read_debug32 0x20006440 at 0x40015800
2021-03-15T21:27:27 DEBUG common.c: *** stlink_read_debug32 0xffff0040 at 0x1ffff7cc
2021-03-15T21:27:27 INFO common.c: F0xx: 8 KiB SRAM, 64 KiB flash in at least 1 KiB pages.
2021-03-15T21:27:27 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-03-15T21:27:27 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-03-15T21:27:27 DEBUG common.c: *** stlink_force_debug_mode ***
2021-03-15T21:27:27 DEBUG common.c: *** stlink_status ***
2021-03-15T21:27:27 DEBUG usb.c: core status: 01030003
2021-03-15T21:27:27 DEBUG common.c: core status: halted
2021-03-15T21:27:27 DEBUG flash.c: @@@@ Read 1 (0x1) option bytes from 0x1ffff800
2021-03-15T21:27:27 DEBUG common.c: @@@@ Read option bytes boot address from 0x1ffff800
2021-03-15T21:27:27 DEBUG common.c: *** stlink_read_debug32 0x00ff55aa at 0x1ffff800
00ff55aa
2021-03-15T21:27:27 DEBUG common.c: *** stlink_exit_debug_mode ***
2021-03-15T21:27:27 DEBUG common.c: *** stlink_write_debug32 0xa05f0000 to 0xe000edf0
2021-03-15T21:27:27 DEBUG common.c: *** stlink_close ***

Same result with correct option byte 0x00ffff00 for level 1.

src/stlink-lib/chipid.c

Ant-ON · 2021-03-23T04:02:40Z

@2a17 OB support for F0 is great. But it is worth noting that the STLINK_FLASH_TYPE_F0 flash type also has F1 and F3 series. F1 series have all same, but F3 series has slight differences in the OB registers.

Nightwalker-87 · 2021-04-02T08:31:46Z

I now have a STM32F0 Discovery Board to allow for testing within the next two weeks.
Please let me know as soon as there is a solution which is expected to be working.
Thus it would be great if someone could pick this up.

2a17 · 2021-04-02T11:31:47Z

I added option byte erase: works.
But option byte write still does not work. After erase FLASH_SR_BSY is set, not after write.
FLASH_SR_EOP is set after erase, not after write option bytes.

I now have a STM32F0 Discovery Board to allow for testing within the next two weeks.
Please let me know as soon as there is a solution which is expected to be working.
Thus it would be great if someone could pick this up.

2a17 · 2021-04-02T14:37:37Z

Oh, i didn't mean to close the merge, sorry.

I have checked all steps with the reference manual (RM0091) and the HAL implementation. It should work.
On page 63 is a description of the Option Bytes programming: 4. Write the data (half-word) to the desired address.
Can that be the problem?

Nightwalker-87 · 2021-04-03T12:56:52Z

Not sure really, @Ant-ON may have an idea.

Ant-ON · 2021-04-03T14:07:41Z

@2a17 The write_uint32 function doesn't write data to target. Try use stlink_write_debug32 / stlink_write_mem32 / stlink_write_mem8

2a17 · 2021-04-03T23:30:56Z

Sorry, I removed all my debug outputs before commit...and the line with stlink_write_debug32 m(
stlink_write_mem8 generates a WRPRTERR in FLASH_SR (also without flash erase).

Ant-ON · 2021-04-05T06:08:38Z

@2a17 WRPERR mean flash is write protected.
In theory, OB should be written by half a word. In stlink implemented only the commands for writing words and bytes. For this reason, I think it is necessary to use a flash loader to write OB.

Nightwalker-87 · 2021-04-05T11:07:37Z

... which we do have already for F0 targets, but not for F1 and F3 ...

Nightwalker-87 · 2021-04-26T19:40:34Z

@Ant-ON: I get the following output with my STM32VLDicsovery board
(I haven't tried the Bluepill because it's a CKS32F103 with core_id 0x2ba1477):

$ st-flash --debug --reset --area=option read > option_byte
2021-04-26T21:39:31 DEBUG common.c: *** looking up stlink version
2021-04-26T21:39:31 DEBUG common.c: st vid         = 0x0483 (expect 0x0483)
2021-04-26T21:39:31 DEBUG common.c: stlink pid     = 0x3744
2021-04-26T21:39:31 DEBUG common.c: stlink version = 0x1
2021-04-26T21:39:31 DEBUG common.c: jtag version   = 0xd
2021-04-26T21:39:31 DEBUG common.c: swim version   = 0x0
2021-04-26T21:39:31 DEBUG common.c:     notice: the firmware doesn't support a swim interface
2021-04-26T21:39:31 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-04-26T21:39:31 DEBUG usb.c: JTAG/SWD freq set to 0
2021-04-26T21:39:31 DEBUG common.c: *** set_swdclk ***
2021-04-26T21:39:31 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-04-26T21:39:31 DEBUG common.c: Loading device parameters....
2021-04-26T21:39:31 DEBUG common.c: *** stlink_core_id ***
2021-04-26T21:39:31 DEBUG common.c: core_id = 0x1ba01477
2021-04-26T21:39:31 DEBUG common.c: *** stlink_read_debug32 0x411fc231 at 0xe000ed00
2021-04-26T21:39:31 DEBUG common.c: *** stlink_read_debug32 0x10016420 at 0xe0042000
2021-04-26T21:39:31 DEBUG common.c: *** stlink_read_debug32 0xffff0080 at 0x1ffff7e0
2021-04-26T21:39:31 INFO common.c: F1xx Value Line: 8 KiB SRAM, 128 KiB flash in at least 1 KiB pages.
2021-04-26T21:39:31 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-04-26T21:39:31 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-04-26T21:39:31 DEBUG common.c: *** stlink_force_debug_mode ***
2021-04-26T21:39:31 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0xe0042004
2021-04-26T21:39:31 DEBUG common.c: *** stlink_write_debug32 0x00000300 to 0xe0042004
2021-04-26T21:39:31 DEBUG common.c: *** stlink_status ***
2021-04-26T21:39:31 DEBUG usb.c: core status: 00030003
2021-04-26T21:39:31 DEBUG common.c:   core status: halted
2021-04-26T21:39:31 DEBUG flash.c: @@@@ Read 0 (0) option bytes from          0
>>> 2021-04-26T21:39:31 ERROR common.c: Option bytes read is currently not supported for connected chip <<<
2021-04-26T21:39:31 DEBUG common.c: *** stlink_exit_debug_mode ***
2021-04-26T21:39:31 DEBUG common.c: *** stlink_write_debug32 0xa05f0000 to 0xe000edf0
2021-04-26T21:39:31 DEBUG common.c: *** stlink_close ***

Ant-ON · 2021-04-27T03:15:20Z

@Nightwalker-87 In my opinion, you are using a branch other than 2a17:option_bytes_for_stm32f0

Nightwalker-87 · 2021-04-27T17:49:11Z

@Ant-ON: I'm rather sure it's the correct one, but will check again later to let you know.

Ant-ON · 2021-04-27T18:05:53Z

@Nightwalker-87 An error from the log occurs when the option_base is zero:

stlink/src/common.c

Lines 4375 to 4378 in 939998d

    
           if (sl->option_base == 0) { 
        
             ELOG("Option bytes read is currently not supported for connected chip\n"); 
        
             return (-1); 
        
           }

But the detected target must have filled the option_base field:

stlink/src/stlink-lib/chipid.c

Lines 246 to 257 in 939998d

    
           // Low and Medium density VL have same chipid. RM0041 25.6.1 
        
           .chip_id = STLINK_CHIPID_STM32_F1_VL_MEDIUM_LOW, 
        
           .description = "F1xx Value Line", 
        
           .flash_type = STLINK_FLASH_TYPE_F0, 
        
           .flash_size_reg = 0x1ffff7e0, 
        
           .flash_pagesize = 0x400, 
        
           .sram_size = 0x2000, // 0x1000 for low density devices 
        
           .bootrom_base = 0x1ffff000, 
        
           .bootrom_size = 0x800, 
        
           .option_base = STM32_F0_OPTION_BYTES_BASE, 
        
           .option_size = 16, 
        
           .flags = CHIP_F_HAS_SWO_TRACING,

ps I added patch for security warning

Nightwalker-87 · 2021-04-27T19:37:31Z

ps I added patch for security warning

I've seen and approved it already. Looks good to me.

Nightwalker-87 · 2021-04-27T21:48:28Z

@Ant-ON With commit 939998d I get the following output when cross-compiling though all CI tests have passed before. I ran sudo make uninstall && sudo make clean && hash -r && sudo make install && sudo ldconfig && sudo make package && sh ./cmake/packaging/windows/generate_binaries.sh before.

/***/stlink/src/stlink-lib/logging.c: In function ‘ugly_log’:
/***/stlink/src/stlink-lib/logging.c:33:3: error: implicit declaration of function ‘localtime_r’; did you mean ‘localtime_s’? [-Werror=implicit-function-declaration]
   33 |   localtime_r(&mytt, &tt);
      |   ^~~~~~~~~~~
      |   localtime_s
cc1: all warnings being treated as errors

Nightwalker-87 · 2021-04-27T21:52:40Z

Shouldn't happen by now, really - I mean how can a remote cross-build CI pass while a very similar local cross-build is failing?!?

Ant-ON · 2021-04-28T03:24:27Z

@Nightwalker-87 This is most likely due to different versions of the gcc/clang.
You can correct the include at the beginning of file:

#define __STDC_WANT_LIB_EXT1__ 1
#include <time.h>

and change the localtime_r function call:

#if defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 201112L)  /* C11 */
# if defined (_WIN32) || (defined(__STDC_LIB_EXT1__)
localtime_s(&tt, &mytt);
# else
localtime_r(&mytt, &tt);
# endif
#else
# error need backport old code
#endif

2a17 · 2021-04-28T20:01:03Z

@2a17 No. The options bytes have a complex storage structure. Writing them down is not easy writing one word (see https://github.com/Ant-ON/stlink/blob/3b7198234478bfb831ec17397be8fc36ba506e4f/src/common.c#L4655-L4666).
stlink_write_option_bytes writes the options byte area fully. It is better to use stlink_write_option_control_register32 if you need to write only a configuration byte without change protection bits:
st-flash --area=optcr read
st-flash --area=optcr write 0xXXXXXXXX

I understood that writing is complex. That is why I did not manage. ;)
I want to change the protection bits with --area=option. It works with my suggestion above.

Ant-ON · 2021-04-29T10:20:40Z

@2a17 The protection bits are outside the first four bytes. There is no way to write them down separately now. It is possible to write only the entire of option bytes area, as it is required to erase the area before writing.
Changing option_size will make impossible to write the entire option bytes area.
A new area can be added to support write (or may erasing only?) protect bits. Similar to optcr area.

Ant-ON · 2021-04-29T17:51:09Z

@Nightwalker-87 I tried to fix the compilation issue. Could you check the compilation?

Nightwalker-87 · 2021-04-29T23:05:48Z

I'll check during the weekend and let you know.

Nightwalker-87 · 2021-05-02T14:20:04Z

@Ant-ON compilation now succeeds on my side.

Nightwalker-87 · 2021-05-02T14:47:08Z

I didn't use the STM32VLDiscovery this time because it gives:

2021-05-02T16:27:27 DEBUG common.c: notice: the firmware doesn't support a swim interface

Here is the result for my CKS32F103C8T6:

Read:

$ st-flash --debug --reset --format binary --flash=128k read option_bytes_dump.bin 0x1FFF7800 4
st-flash 1.6.1-310-g7e7bd74-dirty
2021-05-02T16:31:15 DEBUG common.c: *** looking up stlink version
2021-05-02T16:31:15 DEBUG common.c: st vid         = 0x0483 (expect 0x0483)
2021-05-02T16:31:15 DEBUG common.c: stlink pid     = 0x3748
2021-05-02T16:31:15 DEBUG common.c: stlink version = 0x2
2021-05-02T16:31:15 DEBUG common.c: jtag version   = 0x25
2021-05-02T16:31:15 DEBUG common.c: swim version   = 0x7
2021-05-02T16:31:15 DEBUG common.c: stlink current mode: dfu
2021-05-02T16:31:15 DEBUG usb.c: -- exit_dfu_mode
2021-05-02T16:31:15 DEBUG common.c: *** stlink_exit_dfu_mode ***
2021-05-02T16:31:15 DEBUG usb.c: JTAG/SWD freq set to 0
2021-05-02T16:31:15 DEBUG common.c: *** set_swdclk ***
2021-05-02T16:31:15 DEBUG common.c: stlink current mode: mass
2021-05-02T16:31:15 DEBUG common.c: *** stlink_enter_swd_mode ***
2021-05-02T16:31:15 DEBUG common.c: Loading device parameters....
2021-05-02T16:31:15 DEBUG common.c: *** stlink_core_id ***
2021-05-02T16:31:15 DEBUG common.c: core_id = 0x2ba01477
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0x412fc231 at 0xe000ed00
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0x20036410 at 0xe0042000
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0xffff0040 at 0x1ffff7e0
2021-05-02T16:31:15 INFO common.c: F1xx Medium-density: 20 KiB SRAM, 64 KiB flash in at least 1 KiB pages.
Forcing flash size: --flash=0x00020000
2021-05-02T16:31:15 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-05-02T16:31:15 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-05-02T16:31:15 DEBUG common.c: *** stlink_force_debug_mode ***
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0xe0042004
2021-05-02T16:31:15 DEBUG common.c: *** stlink_write_debug32 0x00000300 to 0xe0042004
2021-05-02T16:31:15 DEBUG common.c: *** stlink_status ***
2021-05-02T16:31:15 DEBUG usb.c: core status: 01030003
2021-05-02T16:31:15 DEBUG common.c:   core status: halted
2021-05-02T16:31:15 INFO common.c: read from address 0x1fff7800 size 4
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_mem32 ***
2021-05-02T16:31:15 DEBUG common.c: data_len = 4 0x4
 80 00 00 00
2021-05-02T16:31:15 DEBUG common.c: *** stlink_reset ***
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0x00030003 at 0xe000edf0
2021-05-02T16:31:15 DEBUG common.c: *** stlink_jtag_reset ***
2021-05-02T16:31:15 DEBUG common.c: *** stlink_jtag_reset ***
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0x00030003 at 0xe000edf0
2021-05-02T16:31:15 WARN common.c: NRST is not connected
2021-05-02T16:31:15 DEBUG common.c: Using reset through SYSRESETREQ
2021-05-02T16:31:15 DEBUG common.c: *** stlink_soft_reset ***
2021-05-02T16:31:15 DEBUG common.c: *** stlink_write_debug32 0xa05f0003 to 0xe000edf0
2021-05-02T16:31:15 DEBUG common.c: *** stlink_write_debug32 0x01000500 to 0xe000edfc
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0x00030003 at 0xe000edf0
2021-05-02T16:31:15 DEBUG common.c: *** stlink_write_debug32 0x05fa0004 to 0xe000ed0c
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0x02010001 at 0xe000edf0
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0x02010001 at 0xe000edf0
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0x02010001 at 0xe000edf0
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0x03010001 at 0xe000edf0
2021-05-02T16:31:15 DEBUG common.c: *** stlink_read_debug32 0x01010001 at 0xe000edf0
2021-05-02T16:31:15 DEBUG common.c: *** stlink_write_debug32 0x0000001f to 0xe000ed30
2021-05-02T16:31:15 DEBUG common.c: *** stlink_exit_debug_mode ***
2021-05-02T16:31:15 DEBUG common.c: *** stlink_write_debug32 0xa05f0000 to 0xe000edf0
2021-05-02T16:31:15 DEBUG common.c: *** stlink_close ***

Write:

$ st-flash --debug --reset --format binary --flash=128k write option_bytes_dump.bin 0x1FFF7800
st-flash 1.6.1-310-g7e7bd74-dirty
2021-05-02T16:34:09 DEBUG common.c: *** looking up stlink version
2021-05-02T16:34:09 DEBUG common.c: st vid         = 0x0483 (expect 0x0483)
2021-05-02T16:34:09 DEBUG common.c: stlink pid     = 0x3748
2021-05-02T16:34:09 DEBUG common.c: stlink version = 0x2
2021-05-02T16:34:09 DEBUG common.c: jtag version   = 0x25
2021-05-02T16:34:09 DEBUG common.c: swim version   = 0x7
2021-05-02T16:34:09 DEBUG common.c: stlink current mode: mass
2021-05-02T16:34:09 DEBUG usb.c: JTAG/SWD freq set to 0
2021-05-02T16:34:09 DEBUG common.c: *** set_swdclk ***
2021-05-02T16:34:09 DEBUG common.c: stlink current mode: mass
2021-05-02T16:34:09 DEBUG common.c: *** stlink_enter_swd_mode ***
2021-05-02T16:34:09 DEBUG common.c: Loading device parameters....
2021-05-02T16:34:09 DEBUG common.c: *** stlink_core_id ***
2021-05-02T16:34:09 DEBUG common.c: core_id = 0x2ba01477
2021-05-02T16:34:09 DEBUG common.c: *** stlink_read_debug32 0x412fc231 at 0xe000ed00
2021-05-02T16:34:09 DEBUG common.c: *** stlink_read_debug32 0x20036410 at 0xe0042000
2021-05-02T16:34:09 DEBUG common.c: *** stlink_read_debug32 0xffff0040 at 0x1ffff7e0
2021-05-02T16:34:09 INFO common.c: F1xx Medium-density: 20 KiB SRAM, 64 KiB flash in at least 1 KiB pages.
Forcing flash size: --flash=0x00020000
2021-05-02T16:34:09 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-05-02T16:34:09 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-05-02T16:34:09 DEBUG common.c: *** stlink_force_debug_mode ***
2021-05-02T16:34:09 DEBUG common.c: *** stlink_read_debug32 0x00000300 at 0xe0042004
2021-05-02T16:34:09 DEBUG common.c: *** stlink_write_debug32 0x00000300 to 0xe0042004
2021-05-02T16:34:09 DEBUG common.c: *** stlink_status ***
2021-05-02T16:34:09 DEBUG usb.c: core status: 01030003
2021-05-02T16:34:09 DEBUG common.c:   core status: halted
Unknown memory region
2021-05-02T16:34:09 DEBUG common.c: *** stlink_exit_debug_mode ***
2021-05-02T16:34:09 DEBUG common.c: *** stlink_write_debug32 0xa05f0000 to 0xe000edf0
2021-05-02T16:34:09 DEBUG common.c: *** stlink_close ***

As one can see the commands seem to run now, but the memory address was just the example from our tutorial - without any reference of being somehow reasonable. I'll need to find out correct addresses for my device.

Nightwalker-87 · 2021-05-02T14:50:25Z

Someone else should try with an appropriate F0 / F1 / F3 board as well.
The above result may not serve as a sufficient verification yet.

Ant-ON · 2021-05-04T08:07:01Z

@Nightwalker-87 SWIM interface uses for programming STM8. I think it is worth removing this warning altogether, as it is misleading.
Full reading of the option bytes area (OBR + WRPR) is not implemented. Only the option byte register:

st-flash --area=optcr read
st-flash --area=optcr write 0xXXXXXXXX

…m32f0

Nightwalker-87 · 2021-05-10T19:40:56Z

@Ant-ON: Seems to work now 👍

Read:

$ st-flash --debug --reset --area=optcr read
st-flash 1.7.0-7-g7afa063-dirty
2021-05-10T21:36:50 DEBUG common.c: *** looking up stlink version
2021-05-10T21:36:50 DEBUG common.c: st vid         = 0x0483 (expect 0x0483)
2021-05-10T21:36:50 DEBUG common.c: stlink pid     = 0x3748
2021-05-10T21:36:50 DEBUG common.c: stlink version = 0x2
2021-05-10T21:36:50 DEBUG common.c: jtag version   = 0x25
2021-05-10T21:36:50 DEBUG common.c: swim version   = 0x7
2021-05-10T21:36:50 DEBUG common.c: stlink current mode: mass
2021-05-10T21:36:50 DEBUG usb.c: JTAG/SWD freq set to 0
2021-05-10T21:36:50 DEBUG common.c: *** set_swdclk ***
2021-05-10T21:36:50 DEBUG common.c: stlink current mode: mass
2021-05-10T21:36:50 DEBUG common.c: *** stlink_enter_swd_mode ***
2021-05-10T21:36:50 DEBUG common.c: Loading device parameters....
2021-05-10T21:36:50 DEBUG common.c: *** stlink_core_id ***
2021-05-10T21:36:50 DEBUG common.c: core_id = 0x2ba01477
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x412fc231 at 0xe000ed00
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x20036410 at 0xe0042000
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0xffff0040 at 0x1ffff7e0
2021-05-10T21:36:50 INFO common.c: F1xx Medium-density: 20 KiB SRAM, 64 KiB flash in at least 1 KiB pages.
2021-05-10T21:36:50 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-05-10T21:36:50 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-05-10T21:36:50 DEBUG common.c: *** stlink_force_debug_mode ***
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x00000300 at 0xe0042004
2021-05-10T21:36:50 DEBUG common.c: *** stlink_write_debug32 0x00000300 to 0xe0042004
2021-05-10T21:36:50 DEBUG common.c: *** stlink_status ***
2021-05-10T21:36:50 DEBUG usb.c: core status: 01030003
2021-05-10T21:36:50 DEBUG common.c:   core status: halted
2021-05-10T21:36:50 DEBUG common.c: @@@@ Read option control register byte from 0x4002201c
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x4002201c
00000000
2021-05-10T21:36:50 DEBUG common.c: *** stlink_reset ***
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x00030003 at 0xe000edf0
2021-05-10T21:36:50 DEBUG common.c: *** stlink_jtag_reset ***
2021-05-10T21:36:50 DEBUG common.c: *** stlink_jtag_reset ***
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x00030003 at 0xe000edf0
2021-05-10T21:36:50 WARN common.c: NRST is not connected
2021-05-10T21:36:50 DEBUG common.c: Using reset through SYSRESETREQ
2021-05-10T21:36:50 DEBUG common.c: *** stlink_soft_reset ***
2021-05-10T21:36:50 DEBUG common.c: *** stlink_write_debug32 0xa05f0003 to 0xe000edf0
2021-05-10T21:36:50 DEBUG common.c: *** stlink_write_debug32 0x01000500 to 0xe000edfc
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x00030003 at 0xe000edf0
2021-05-10T21:36:50 DEBUG common.c: *** stlink_write_debug32 0x05fa0004 to 0xe000ed0c
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x02010001 at 0xe000edf0
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x02010001 at 0xe000edf0
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x02010001 at 0xe000edf0
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x03010001 at 0xe000edf0
2021-05-10T21:36:50 DEBUG common.c: *** stlink_read_debug32 0x01010001 at 0xe000edf0
2021-05-10T21:36:50 DEBUG common.c: *** stlink_write_debug32 0x0000001f to 0xe000ed30
2021-05-10T21:36:50 DEBUG common.c: *** stlink_exit_debug_mode ***
2021-05-10T21:36:50 DEBUG common.c: *** stlink_write_debug32 0xa05f0000 to 0xe000edf0
2021-05-10T21:36:50 DEBUG common.c: *** stlink_close ***

Write:

$ st-flash --debug --reset --area=optcr write 0x4002201c
st-flash 1.7.0-7-g7afa063-dirty
2021-05-10T21:38:49 DEBUG common.c: *** looking up stlink version
2021-05-10T21:38:49 DEBUG common.c: st vid         = 0x0483 (expect 0x0483)
2021-05-10T21:38:49 DEBUG common.c: stlink pid     = 0x3748
2021-05-10T21:38:49 DEBUG common.c: stlink version = 0x2
2021-05-10T21:38:49 DEBUG common.c: jtag version   = 0x25
2021-05-10T21:38:49 DEBUG common.c: swim version   = 0x7
2021-05-10T21:38:49 DEBUG common.c: stlink current mode: mass
2021-05-10T21:38:49 DEBUG usb.c: JTAG/SWD freq set to 0
2021-05-10T21:38:49 DEBUG common.c: *** set_swdclk ***
2021-05-10T21:38:49 DEBUG common.c: stlink current mode: mass
2021-05-10T21:38:49 DEBUG common.c: *** stlink_enter_swd_mode ***
2021-05-10T21:38:49 DEBUG common.c: Loading device parameters....
2021-05-10T21:38:49 DEBUG common.c: *** stlink_core_id ***
2021-05-10T21:38:49 DEBUG common.c: core_id = 0x2ba01477
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x412fc231 at 0xe000ed00
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x20036410 at 0xe0042000
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0xffff0040 at 0x1ffff7e0
2021-05-10T21:38:49 INFO common.c: F1xx Medium-density: 20 KiB SRAM, 64 KiB flash in at least 1 KiB pages.
2021-05-10T21:38:49 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-05-10T21:38:49 DEBUG common.c: stlink current mode: debug (jtag or swd)
2021-05-10T21:38:49 DEBUG common.c: *** stlink_force_debug_mode ***
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000300 at 0xe0042004
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x00000300 to 0xe0042004
2021-05-10T21:38:49 DEBUG common.c: *** stlink_status ***
2021-05-10T21:38:49 DEBUG usb.c: core status: 01030003
2021-05-10T21:38:49 DEBUG common.c:   core status: halted
2021-05-10T21:38:49 DEBUG flash.c: @@@@ Write 1073881116 (0x4002201c) to option control register
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x4002200c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000080 at 0x40022010
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x45670123 to 0x40022004
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0xcdef89ab to 0x40022004
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x40022010
2021-05-10T21:38:49 DEBUG common.c: Successfully unlocked flash
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x40022010
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x45670123 to 0x40022008
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0xcdef89ab to 0x40022008
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000200 at 0x40022010
2021-05-10T21:38:49 DEBUG common.c: Successfully unlocked flash option
2021-05-10T21:38:49 INFO common.c: Asked to write option control register 0x4002201c to 0x4002201c.
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x00000014 to 0x4002200c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x4002201c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0xffffffff at 0x40022020
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x00000014 to 0x4002200c
2021-05-10T21:38:49 WARN common.c: Erasing option bytes
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x00000220 to 0x40022010
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x00000260 to 0x40022010
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000001 at 0x4002200c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000001 at 0x4002200c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000001 at 0x4002200c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000001 at 0x4002200c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000001 at 0x4002200c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000001 at 0x4002200c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000020 at 0x4002200c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000020 at 0x4002200c
2021-05-10T21:38:49 WARN common.c: Writing option bytes to 0x1ffff800
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x00000210 to 0x40022010
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0xa05f0003 to 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0xa05f000b to 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_mem32 52 bytes to 0x20000000
2021-05-10T21:38:49 INFO flash_loader.c: Successfully loaded flash loader in sram
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000001 at 0xe000ed30
2021-05-10T21:38:49 INFO flash_loader.c: Clear DFSR
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x00000001 to 0xe000ed30
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0xe000ed28
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0xe000ed2c
2021-05-10T21:38:49 DEBUG flash_loader.c: Running flash loader, write address:0x1ffff800, size: 16
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_mem32 16 bytes to 0x20000034
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_reg
2021-05-10T21:38:49 DEBUG common.c: data_len = 2 0x2
 80 00
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_reg
2021-05-10T21:38:49 DEBUG common.c: data_len = 2 0x2
 80 00
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_reg
2021-05-10T21:38:49 DEBUG common.c: data_len = 2 0x2
 80 00
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_reg
2021-05-10T21:38:49 DEBUG common.c: data_len = 2 0x2
 80 00
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_reg
2021-05-10T21:38:49 DEBUG common.c: data_len = 2 0x2
 80 00
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x0000aaaa to 0x40003000
2021-05-10T21:38:49 DEBUG common.c: *** stlink_run ***
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_reg
2021-05-10T21:38:49 DEBUG common.c:  (16) ***
2021-05-10T21:38:49 DEBUG common.c: data_len = 8 0x8
 80 00 00 00 00 00 00 81
2021-05-10T21:38:49 DEBUG usb.c: r_idx (16) = 0x81000000
2021-05-10T21:38:49 DEBUG common.c: *** stlink_status ***
2021-05-10T21:38:49 DEBUG usb.c: core status: 0103000B
2021-05-10T21:38:49 DEBUG common.c:   core status: halted
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_reg
2021-05-10T21:38:49 DEBUG common.c:  (2) ***
2021-05-10T21:38:49 DEBUG common.c: data_len = 8 0x8
 80 00 00 00 00 00 00 00
2021-05-10T21:38:49 DEBUG usb.c: r_idx ( 2) = 0x00000000
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x00002000 to 0x40022010
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000020 at 0x4002200c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00000020 at 0x4002200c
2021-05-10T21:38:49 INFO common.c: Wrote option bytes 0x4002201c to 0x4002201c!
2021-05-10T21:38:49 INFO common.c: Wrote option control register 0x4002201c!
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x40022010
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0000000000 to 0x40022010
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0000000000 at 0x40022010
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x00000080 to 0x40022010
2021-05-10T21:38:49 DEBUG common.c: *** stlink_reset ***
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x0003000b at 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_jtag_reset ***
2021-05-10T21:38:49 DEBUG common.c: *** stlink_jtag_reset ***
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x0003000b at 0xe000edf0
2021-05-10T21:38:49 WARN common.c: NRST is not connected
2021-05-10T21:38:49 DEBUG common.c: Using reset through SYSRESETREQ
2021-05-10T21:38:49 DEBUG common.c: *** stlink_soft_reset ***
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0xa05f0003 to 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x01000500 to 0xe000edfc
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x00030003 at 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x05fa0004 to 0xe000ed0c
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x02010001 at 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x02010001 at 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x02010001 at 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x03010001 at 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_read_debug32 0x01010001 at 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0x0000001f to 0xe000ed30
2021-05-10T21:38:49 DEBUG common.c: *** stlink_exit_debug_mode ***
2021-05-10T21:38:49 DEBUG common.c: *** stlink_write_debug32 0xa05f0000 to 0xe000edf0
2021-05-10T21:38:49 DEBUG common.c: *** stlink_close ***

2a17 marked this pull request as draft March 22, 2021 21:49

Nightwalker-87 assigned 2a17 Mar 22, 2021

Nightwalker-87 self-requested a review March 22, 2021 22:57

Nightwalker-87 added code/feature-request target/stm32f0 labels Mar 22, 2021

Nightwalker-87 added this to the v1.6.2 milestone Mar 22, 2021

Ant-ON reviewed Mar 23, 2021

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Ant-ON mentioned this pull request Mar 26, 2021

Flash loader counter error on STM32F107VCT6 #808

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This was linked to issues Mar 26, 2021

Flash loader counter error on STM32F107VCT6 #808

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STM32F103C8T6: st-flash terminates unexpectedly when trying to read the chip #1084

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Nightwalker-87 changed the title ~~writing option bytes for stm32f0~~ Support for writing option bytes on STM32F0 & STM32F1 Mar 27, 2021

Nightwalker-87 mentioned this pull request Mar 27, 2021

STM32F103C8T6: st-flash terminates unexpectedly when trying to read the chip #1084

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Nightwalker-87 added the target/stm32f1 label Mar 27, 2021

Nightwalker-87 linked an issue Apr 2, 2021 that may be closed by this pull request

[feature] Writing option bytes of STM32F091RCT6 #458

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Nightwalker-87 reopened this Apr 2, 2021

Nightwalker-87 marked this pull request as ready for review April 3, 2021 10:58

Nightwalker-87 changed the title ~~Support for writing option bytes on STM32F0 & STM32F1~~ Support for writing option bytes on STM32F0/F1/F3 Apr 3, 2021

Nightwalker-87 added the priority/high label Apr 9, 2021

Nightwalker-87 assigned Ant-ON Apr 10, 2021

Fixed security warning

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Nightwalker-87 approved these changes Apr 27, 2021

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Using localtime instead safe variant in case of compiler below C11

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Nightwalker-87 added the needs/testing label May 2, 2021

Nightwalker-87 linked an issue May 4, 2021 that may be closed by this pull request

[feature] Read protect bits #346

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Merge remote-tracking branch 'origin/master' into option_bytes_for_st…

7afa063

…m32f0

Nightwalker-87 added status/resolved status/resolved-verified component/st-flash and removed needs/testing labels May 10, 2021

Nightwalker-87 merged commit 48ebad3 into stlink-org:develop May 10, 2021

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Support for writing option bytes on STM32F0/F1/F3 #1112

Support for writing option bytes on STM32F0/F1/F3 #1112

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Support for writing option bytes on STM32F0/F1/F3 #1112

Support for writing option bytes on STM32F0/F1/F3 #1112

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2a17 commented Mar 22, 2021 •

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Nightwalker-87 commented Apr 2, 2021 •

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2a17 commented Apr 2, 2021 •

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2a17 commented Apr 2, 2021 •

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Nightwalker-87 commented Apr 3, 2021 •

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Nightwalker-87 commented Apr 26, 2021 •

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Nightwalker-87 commented Apr 27, 2021 •

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Ant-ON commented Apr 27, 2021 •

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Nightwalker-87 commented Apr 27, 2021 •

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Nightwalker-87 commented May 10, 2021 •

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