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Merge pull request #41 from SFxingyuwu/visionfive-5.15.y-devel_td
dts: starfive: Amend Vdec module device tree
2 parents 45d1740 + 8c3583d commit c04be8b

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arch/riscv/boot/dts/starfive/jh7100.dtsi

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Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -642,8 +642,18 @@
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vpu_dec: vpu_dec@118f0000 {
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compatible = "c&m,cm511-vpu";
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reg = <0 0x118f0000 0 0x10000>;
645-
clocks = <&clkgen JH7100_CLK_VP6_CORE>;
646-
clock-names = "vcodec";
645+
clocks =<&clkgen JH7100_CLK_VDEC_AXI>,
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<&clkgen JH7100_CLK_VDECBRG_MAIN>,
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<&clkgen JH7100_CLK_VDEC_BCLK>,
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<&clkgen JH7100_CLK_VDEC_CCLK>,
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<&clkgen JH7100_CLK_VDEC_APB>;
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clock-names = "vdec_axi", "vdecbrg_main", "vdec_bclk", "vdec_cclk", "vdec_apb";
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resets = <&rstgen JH7100_RSTN_VDEC_AXI>,
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<&rstgen JH7100_RSTN_VDECBRG_MAIN>,
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<&rstgen JH7100_RSTN_VDEC_BCLK>,
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<&rstgen JH7100_RSTN_VDEC_CCLK>,
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<&rstgen JH7100_RSTN_VDEC_APB>;
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reset-names = "vdec_axi", "vdecbrg_main", "vdec_bclk", "vdec_cclk", "vdec_apb";
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interrupts = <23>;
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//memory-region = <&vpu_reserved>;
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};

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