[CM Conv] Enable SIMD16 Support for DPAS Convolutions #29
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Prithviraj-R
commented
Jul 15, 2024
| @@ -1503,12 +1525,13 @@ class ConvolutionCmDispatcher : public ConvolutionBaseDispatcher | |||
| std::uint32_t gws_z = 0; | |||
| if (output_layout == DataLayout::eIO_i8_o8_i2) | |||
| { | |||
| const std::uint32_t ic_chunks_per_hw_thread = 8; | |||
| const std::uint32_t exec_size = 8; | |||
| const std::uint32_t exec_size = 16; // BMG = 16, DG2 = 8 | |||
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@smarcink How to handle this?
| @@ -1452,7 +1473,8 @@ class ConvolutionCmDispatcher : public ConvolutionBaseDispatcher | |||
| const uint32_t out_ch_size = static_cast<uint32_t>(std::ceil(params_.filter_shape.n / (double)(cm_params_.block_oc))); | |||
| const auto gws_x = cm_params_.slice_ic * (round_up_next_multiple(output_shape_.w, cm_params_.block_w) / cm_params_.block_w); | |||
| const auto gws_y = round_up_next_multiple(output_shape_.h, cm_params_.block_h) / cm_params_.block_h; | |||
| const auto gws_z = (params_.input_shape.n / cm_params_.block_batch) * out_ch_size; | |||
| const auto execsize = 2; // BMG = 2, DG2 = 1 | |||
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@smarcink how to handle this?
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