16 bit RISC processor was built using hardware descriptive language in verilog. That is built in harvard architechture and consist of programme counter, instruction memory, instruction register, data memory, general purpose register, special purpose register and ALU. this repository has included all the source and other object files and the main code can be found inside the RISC_V_processor.srcs folder.
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sineefa/16-bit-risc-processer
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