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akpm00 committed Dec 20, 2022
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4 changes: 4 additions & 0 deletions CREDITS
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Expand Up @@ -1439,6 +1439,10 @@ N: Justin Guyett
E: jguyett@andrew.cmu.edu
D: via-rhine net driver hacking

N: Nitin Gupta
E: ngupta@vflare.org
D: zsmalloc memory allocator and zram block device driver

N: Danny ter Haar
E: dth@cistron.nl
D: /proc/cpuinfo, reboot on panic , kernel pre-patch tester ;)
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12 changes: 12 additions & 0 deletions Documentation/ABI/stable/sysfs-driver-dma-idxd
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Expand Up @@ -22,6 +22,7 @@ Date: Oct 25, 2019
KernelVersion: 5.6.0
Contact: dmaengine@vger.kernel.org
Description: The largest number of work descriptors in a batch.
It's not visible when the device does not support batch.

What: /sys/bus/dsa/devices/dsa<m>/max_work_queues_size
Date: Oct 25, 2019
Expand Down Expand Up @@ -49,6 +50,8 @@ Description: The total number of read buffers supported by this device.
The read buffers represent resources within the DSA
implementation, and these resources are allocated by engines to
support operations. See DSA spec v1.2 9.2.4 Total Read Buffers.
It's not visible when the device does not support Read Buffer
allocation control.

What: /sys/bus/dsa/devices/dsa<m>/max_transfer_size
Date: Oct 25, 2019
Expand Down Expand Up @@ -122,6 +125,8 @@ Contact: dmaengine@vger.kernel.org
Description: The maximum number of read buffers that may be in use at
one time by operations that access low bandwidth memory in the
device. See DSA spec v1.2 9.2.8 GENCFG on Global Read Buffer Limit.
It's not visible when the device does not support Read Buffer
allocation control.

What: /sys/bus/dsa/devices/dsa<m>/cmd_status
Date: Aug 28, 2020
Expand Down Expand Up @@ -205,6 +210,7 @@ KernelVersion: 5.10.0
Contact: dmaengine@vger.kernel.org
Description: The max batch size for this workqueue. Cannot exceed device
max batch size. Configurable parameter.
It's not visible when the device does not support batch.

What: /sys/bus/dsa/devices/wq<m>.<n>/ats_disable
Date: Nov 13, 2020
Expand Down Expand Up @@ -250,6 +256,8 @@ KernelVersion: 5.17.0
Contact: dmaengine@vger.kernel.org
Description: Enable the use of global read buffer limit for the group. See DSA
spec v1.2 9.2.18 GRPCFG Use Global Read Buffer Limit.
It's not visible when the device does not support Read Buffer
allocation control.

What: /sys/bus/dsa/devices/group<m>.<n>/read_buffers_allowed
Date: Dec 10, 2021
Expand All @@ -258,6 +266,8 @@ Contact: dmaengine@vger.kernel.org
Description: Indicates max number of read buffers that may be in use at one time
by all engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read
Buffers Allowed.
It's not visible when the device does not support Read Buffer
allocation control.

What: /sys/bus/dsa/devices/group<m>.<n>/read_buffers_reserved
Date: Dec 10, 2021
Expand All @@ -266,6 +276,8 @@ Contact: dmaengine@vger.kernel.org
Description: Indicates the number of Read Buffers reserved for the use of
engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read Buffers
Reserved.
It's not visible when the device does not support Read Buffer
allocation control.

What: /sys/bus/dsa/devices/group<m>.<n>/desc_progress_limit
Date: Sept 14, 2022
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32 changes: 27 additions & 5 deletions Documentation/admin-guide/kernel-parameters.txt
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Expand Up @@ -1050,6 +1050,11 @@
them frequently to increase the rate of SLB faults
on kernel addresses.

stress_hpt [PPC]
Limits the number of kernel HPT entries in the hash
page table to increase the rate of hash page table
faults on kernel addresses.

disable= [IPV6]
See Documentation/networking/ipv6.rst.

Expand Down Expand Up @@ -2308,7 +2313,13 @@
Provide an override to the IOAPIC-ID<->DEVICE-ID
mapping provided in the IVRS ACPI table.
By default, PCI segment is 0, and can be omitted.
For example:

For example, to map IOAPIC-ID decimal 10 to
PCI segment 0x1 and PCI device 00:14.0,
write the parameter as:
ivrs_ioapic=10@0001:00:14.0

Deprecated formats:
* To map IOAPIC-ID decimal 10 to PCI device 00:14.0
write the parameter as:
ivrs_ioapic[10]=00:14.0
Expand All @@ -2320,7 +2331,13 @@
Provide an override to the HPET-ID<->DEVICE-ID
mapping provided in the IVRS ACPI table.
By default, PCI segment is 0, and can be omitted.
For example:

For example, to map HPET-ID decimal 10 to
PCI segment 0x1 and PCI device 00:14.0,
write the parameter as:
ivrs_hpet=10@0001:00:14.0

Deprecated formats:
* To map HPET-ID decimal 0 to PCI device 00:14.0
write the parameter as:
ivrs_hpet[0]=00:14.0
Expand All @@ -2331,15 +2348,20 @@
ivrs_acpihid [HW,X86-64]
Provide an override to the ACPI-HID:UID<->DEVICE-ID
mapping provided in the IVRS ACPI table.
By default, PCI segment is 0, and can be omitted.

For example, to map UART-HID:UID AMD0020:0 to
PCI segment 0x1 and PCI device ID 00:14.5,
write the parameter as:
ivrs_acpihid[0001:00:14.5]=AMD0020:0
ivrs_acpihid=AMD0020:0@0001:00:14.5

By default, PCI segment is 0, and can be omitted.
For example, PCI device 00:14.5 write the parameter as:
Deprecated formats:
* To map UART-HID:UID AMD0020:0 to PCI segment is 0,
PCI device ID 00:14.5, write the parameter as:
ivrs_acpihid[00:14.5]=AMD0020:0
* To map UART-HID:UID AMD0020:0 to PCI segment 0x1 and
PCI device ID 00:14.5, write the parameter as:
ivrs_acpihid[0001:00:14.5]=AMD0020:0

js= [HW,JOY] Analog joystick
See Documentation/input/joydev/joystick.rst.
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8 changes: 4 additions & 4 deletions Documentation/admin-guide/sysctl/kernel.rst
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Expand Up @@ -436,8 +436,8 @@ ignore-unaligned-usertrap

On architectures where unaligned accesses cause traps, and where this
feature is supported (``CONFIG_SYSCTL_ARCH_UNALIGN_NO_WARN``;
currently, ``arc`` and ``ia64``), controls whether all unaligned traps
are logged.
currently, ``arc``, ``ia64`` and ``loongarch``), controls whether all
unaligned traps are logged.

= =============================================================
0 Log all unaligned accesses.
Expand Down Expand Up @@ -1492,8 +1492,8 @@ unaligned-trap

On architectures where unaligned accesses cause traps, and where this
feature is supported (``CONFIG_SYSCTL_ARCH_UNALIGN_ALLOW``; currently,
``arc`` and ``parisc``), controls whether unaligned traps are caught
and emulated (instead of failing).
``arc``, ``parisc`` and ``loongarch``), controls whether unaligned traps
are caught and emulated (instead of failing).

= ========================================================
0 Do not emulate unaligned accesses.
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/bcm2835.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom BCM2711/BCM2835 Platforms Device Tree Bindings
title: Broadcom BCM2711/BCM2835 Platforms

maintainers:
- Eric Anholt <eric@anholt.net>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm11351.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom BCM11351 device tree bindings
title: Broadcom BCM11351

maintainers:
- Florian Fainelli <f.fainelli@gmail.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm21664.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom BCM21664 device tree bindings
title: Broadcom BCM21664

maintainers:
- Florian Fainelli <f.fainelli@gmail.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm23550.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom BCM23550 device tree bindings
title: Broadcom BCM23550

maintainers:
- Florian Fainelli <f.fainelli@gmail.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4708.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom BCM4708 device tree bindings
title: Broadcom BCM4708

description:
Broadcom BCM4708/47081/4709/47094/53012 Wi-Fi/network SoCs based
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,bcmbca.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom Broadband SoC device tree bindings
title: Broadcom Broadband SoC

description:
Broadcom Broadband SoCs include family of high performance DSL/PON/Wireless
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,cygnus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom Cygnus device tree bindings
title: Broadcom Cygnus

maintainers:
- Ray Jui <rjui@broadcom.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,hr2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom Hurricane 2 device tree bindings
title: Broadcom Hurricane 2

description:
Broadcom Hurricane 2 family of SoCs are used for switching control. These SoCs
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,ns2.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom North Star 2 (NS2) device tree bindings
title: Broadcom North Star 2 (NS2)

maintainers:
- Ray Jui <rjui@broadcom.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,nsp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom Northstar Plus device tree bindings
title: Broadcom Northstar Plus

description:
Broadcom Northstar Plus family of SoCs are used for switching control
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,stingray.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom Stingray device tree bindings
title: Broadcom Stingray

maintainers:
- Ray Jui <rjui@broadcom.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/bcm/brcm,vulcan-soc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom Vulcan device tree bindings
title: Broadcom Vulcan

maintainers:
- Robert Richter <rrichter@marvell.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/cci-control-port.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/cci-control-port.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: CCI Interconnect Bus Masters binding
title: CCI Interconnect Bus Masters

maintainers:
- Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/cpus.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/cpus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ARM CPUs bindings
title: ARM CPUs

maintainers:
- Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/firmware/linaro,optee-tz.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: OP-TEE Device Tree Bindings
title: OP-TEE

maintainers:
- Jens Wiklander <jens.wiklander@linaro.org>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/hisilicon/hisilicon.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Hisilicon Platforms Device Tree Bindings
title: Hisilicon Platforms

maintainers:
- Wei Xu <xuwei5@hisilicon.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/keystone/ti,k3-sci-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Common K3 TI-SCI bindings
title: Common K3 TI-SCI

maintainers:
- Nishanth Menon <nm@ti.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/keystone/ti,sci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TI-SCI controller device node bindings
title: TI-SCI controller

maintainers:
- Nishanth Menon <nm@ti.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/marvell/armada-7k-8k.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Marvell Armada 7K/8K Platforms Device Tree Bindings
title: Marvell Armada 7K/8K Platforms

maintainers:
- Gregory CLEMENT <gregory.clement@bootlin.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/mrvl/mrvl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Marvell Platforms Device Tree Bindings
title: Marvell Platforms

maintainers:
- Lubomir Rintel <lkundrak@v3.sk>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/mstar/mstar.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/mstar/mstar.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MStar platforms device tree bindings
title: MStar platforms

maintainers:
- Daniel Palmer <daniel@thingy.jp>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/npcm/npcm.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/npcm/npcm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NPCM Platforms Device Tree Bindings
title: NPCM Platforms

maintainers:
- Jonathan Neuschäfer <j.neuschaefer@gmx.net>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/nxp/lpc32xx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP LPC32xx Platforms Device Tree Bindings
title: NXP LPC32xx Platforms

maintainers:
- Roland Stigge <stigge@antcom.de>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/socionext/milbeaut.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Milbeaut platforms device tree bindings
title: Milbeaut platforms

maintainers:
- Taichi Sugaya <sugaya.taichi@socionext.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/socionext/uniphier.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/socionext/uniphier.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Socionext UniPhier platform device tree bindings
title: Socionext UniPhier platform

maintainers:
- Masahiro Yamada <yamada.masahiro@socionext.com>
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/arm/sp810.yaml
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Expand Up @@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/arm/sp810.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ARM Versatile Express SP810 System Controller bindings
title: ARM Versatile Express SP810 System Controller

maintainers:
- Andre Przywara <andre.przywara@arm.com>
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