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shreyas-damn/README.md

Hi 👋, I'm Shreyas

🎓 Electronics & Telecommunications Undergraduate
⚡ Interested in Analog Circuit Design, VLSI & Embedded Systems
💻 Exploring Digital Design, Verilog, LTspice & System Architecture

🔧 Core Focus Areas

  • RTL design & verification (Verilog)
  • EDA Tools
  • Digital Logic & Computer Architecture

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  1. Logic-gates-using-verilog Logic-gates-using-verilog Public

    Logic gates using icarus verilog

    Verilog

  2. Filter-circuits-LTspice- Filter-circuits-LTspice- Public

    Simulation and verification of various filter circuits