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phase-check related issues #780

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phase-check related issues #780

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lispc
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@lispc lispc commented Aug 16, 2023

  1. test_aggregation_circuit failed in this branch. @zhenfeizhang can you have a check whether this is a circuit bug, or false negative?
  2. cargo test --release ecc_circuit 2>&1 | tee ecc.log

@kunxian-xia
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The false alarm can be avoided by scroll-tech/halo2#61.

@lispc lispc changed the title Cargo test --release ripemd_160_staticcall reports err in copy circuit phase-check related issues Aug 17, 2023
@lispc lispc reopened this Aug 17, 2023
@zhenfeizhang
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cargo test --release -p zkevm-circuits ecc_circuit 2>&1 | tee ecc.log
running 3 tests
test ecc_circuit::test::test_ecc_circuit_negative has been running for over 60 seconds
test ecc_circuit::test::test_ecc_circuit_positive has been running for over 60 seconds
test ecc_circuit::test::variadic_size_check has been running for over 60 seconds
test ecc_circuit::test::test_ecc_circuit_positive ... ok
test ecc_circuit::test::test_ecc_circuit_negative ... ok
test ecc_circuit::test::variadic_size_check ... ok

@zhenfeizhang zhenfeizhang marked this pull request as ready for review August 18, 2023 20:03
@zhenfeizhang
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This is a very interesting bug and worth some documentation.

in halo2-lib there is a function

ecc_chip.load_random_point::<G1Affine>(ctx)

This function is not deterministic. For multiple phases, this function will return different points. When multi-phase is enabled, the cells will be filled in with different points during different phases. And therefore during the phase check we get errors like

PHASE ERR columnXX not same after phase Phase(1)

Comment on lines +497 to +505
fn decompose_ec_add_op_phase_2(
&self,
ctx: &mut Context<F>,
ecc_chip: &EccChip<F, FpConfig<F, Fq>>,
ec_decomposed: &[EcAddDecomposed<F>],
challenges: &Challenges<Value<F>>,
) {
log::trace!("[ECC] ==> EcAdd Assignment START:");
log_context_cursor!(ctx);

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If you move the ec addition execution to phase 2, then the above configuration of phase1 & phase2 cols [33, 1] is not right as it needs much more phase cols now.

Comment on lines +517 to +522
let mut buf = F::default();
challenges.keccak_input().map(|x| buf = x);
let mut rng = ChaCha20Rng::from_seed(buf.to_repr());
let p = G1Affine::random(&mut rng);
let G1Affine { x, y } = p;
let point = ecc_chip.load_private(ctx, (Value::known(x), Value::known(y)));

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When the mock prover is doing 1st synthesis, the rng is seeded with 0. But for 2nd synthesis, it is then seeded with keccak_input().

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3 participants