Merge pull request #8 from twitchyliquid64/master

Set clock line to idle level on SPI initialization

Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "bitbang-hal"
-version = "0.3.0"
+version = "0.3.1"
 authors = ["Paul Sajna <sajattack@gmail.com>"]
 edition = "2018"
 description = "Implements embedded-hal traits by bitbanging"

src/spi.rs

@@ -1,7 +1,7 @@
 pub use embedded_hal::spi::{MODE_0, MODE_1, MODE_2, MODE_3};
 
 use embedded_hal::digital::v2::{InputPin, OutputPin};
-use embedded_hal::spi::{FullDuplex, Mode};
+use embedded_hal::spi::{FullDuplex, Mode, Polarity};
 use embedded_hal::timer::{CountDown, Periodic};
 use nb::block;
 
@@ -56,15 +56,22 @@ where
         sck: Sck,
         timer: Timer,
     ) -> Self {
-        SPI {
+        let mut spi = SPI {
             mode,
             miso,
             mosi,
             sck,
             timer,
             read_val: None,
             bit_order: BitOrder::default(),
-        }
+        };
+
+        match mode.polarity {
+            Polarity::IdleLow => spi.sck.set_low(),
+            Polarity::IdleHigh => spi.sck.set_high(),
+        }.unwrap_or(());
+
+        spi
     }
 
     pub fn set_bit_order(&mut self, order: BitOrder) {