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b380d35
add ui test for issue-62097
csmoe Oct 23, 2019
dcc14c4
suggest to add a constraint except asyn-fn without explicit output
csmoe Oct 23, 2019
9124f7a
update suggestion ui test
csmoe Oct 23, 2019
405866a
re-add miri intrinsic ABI check
RalfJung Nov 16, 2019
44b6811
rename and move read_vector_ty
RalfJung Nov 16, 2019
09180d7
make simd_size return a u64
RalfJung Nov 16, 2019
8952c8a
ICE on invalid MIR
RalfJung Nov 16, 2019
5e115a2
avoid some casts
RalfJung Nov 16, 2019
5b0e702
Create a generic HashStable derive.
cjgillot Nov 9, 2019
c2e1658
Use proc_macro for HashStable derive in libsyntax.
cjgillot Nov 9, 2019
05f5f76
Move impl HashStable for SymbolStr in libsyntax_pos.
cjgillot Nov 9, 2019
1dd5133
Move impl HashStable for Symbol in libsyntax_pos.
cjgillot Nov 9, 2019
efcb695
Further HashStable_Generic derives.
cjgillot Nov 9, 2019
2a67986
HashStable literals in libsyntax.
cjgillot Nov 9, 2019
a265bc2
HashStable_Generic for libsyntax_pos.
cjgillot Nov 9, 2019
2ba84c6
HashStable_Generic for librustc_target.
cjgillot Nov 9, 2019
333c114
Derive HashStable in librustc_target.
cjgillot Nov 9, 2019
375a761
HashStable in libsyntax.
cjgillot Nov 9, 2019
79bde05
Derive HashStable for PanicStrategy.
cjgillot Nov 9, 2019
e8e7ad6
Implement HashStable for RangeInclusive.
cjgillot Nov 16, 2019
5b4dad7
Derive HashStable_Generic for ABI types.
cjgillot Nov 16, 2019
3d97a91
Remove extern crate.
cjgillot Nov 16, 2019
44a595f
Simplify impl for SymbolStr.
cjgillot Nov 16, 2019
eda67ba
Disable gdb pretty printer global section on wasm targets
alexcrichton Nov 18, 2019
44cebe5
reduce size of hir::ExprKind
Centril Nov 18, 2019
d0b67dd
Revert "Update Source Code Pro and include italics"
GuillaumeGomez Nov 21, 2019
6bd7e74
Rollup merge of #65730 - csmoe:return-lifetime, r=nikomatsakis
Centril Nov 21, 2019
3fcba01
Rollup merge of #66460 - cjgillot:hashstable_generic, r=Zoxc
Centril Nov 21, 2019
4aceeff
Rollup merge of #66468 - RalfJung:simd-cleanup, r=oli-obk
Centril Nov 21, 2019
411b298
Rollup merge of #66515 - Centril:cheaper-inline-asm, r=oli-obk
Centril Nov 21, 2019
939c44c
Rollup merge of #66520 - alexcrichton:disable-gdb-wasm, r=eddyb
Centril Nov 21, 2019
17c32bf
Rollup merge of #66602 - GuillaumeGomez:revert-font, r=GuillaumeGomez
Centril Nov 21, 2019
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make simd_size return a u64
  • Loading branch information
RalfJung committed Nov 16, 2019
commit 09180d71fd382c8d0471ff342147d91def3a1595
2 changes: 1 addition & 1 deletion src/librustc/ty/layout.rs
Original file line number Diff line number Diff line change
Expand Up @@ -697,7 +697,7 @@ impl<'tcx> LayoutCx<'tcx, TyCtxt<'tcx>> {
// SIMD vector types.
ty::Adt(def, ..) if def.repr.simd() => {
let element = self.layout_of(ty.simd_type(tcx))?;
let count = ty.simd_size(tcx) as u64;
let count = ty.simd_size(tcx);
assert!(count > 0);
let scalar = match element.abi {
Abi::Scalar(ref scalar) => scalar.clone(),
Expand Down
8 changes: 4 additions & 4 deletions src/librustc/ty/sty.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1819,20 +1819,20 @@ impl<'tcx> TyS<'tcx> {
}
}

pub fn simd_size(&self, _tcx: TyCtxt<'tcx>) -> usize {
pub fn simd_size(&self, _tcx: TyCtxt<'tcx>) -> u64 {
// Parameter currently unused, but probably needed in the future to
// allow `#[repr(simd)] struct Simd<T, const N: usize>([T; N]);`.
match self.kind {
Adt(def, _) => def.non_enum_variant().fields.len(),
Adt(def, _) => def.non_enum_variant().fields.len() as u64,
_ => bug!("simd_size called on invalid type")
}
}

pub fn simd_size_and_type(&self, tcx: TyCtxt<'tcx>) -> (usize, Ty<'tcx>) {
pub fn simd_size_and_type(&self, tcx: TyCtxt<'tcx>) -> (u64, Ty<'tcx>) {
match self.kind {
Adt(def, substs) => {
let variant = def.non_enum_variant();
(variant.fields.len(), variant.fields[0].ty(tcx, substs))
(variant.fields.len() as u64, variant.fields[0].ty(tcx, substs))
}
_ => bug!("simd_size_and_type called on invalid type")
}
Expand Down
22 changes: 13 additions & 9 deletions src/librustc_codegen_llvm/intrinsic.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,7 @@ use syntax_pos::Span;

use std::cmp::Ordering;
use std::{iter, i128, u128};
use std::convert::TryFrom;

fn get_simple_intrinsic(cx: &CodegenCx<'ll, '_>, name: &str) -> Option<&'ll Value> {
let llvm_name = match name {
Expand Down Expand Up @@ -1105,8 +1106,8 @@ fn generic_simd_intrinsic(
let m_len = match in_ty.kind {
// Note that this `.unwrap()` crashes for isize/usize, that's sort
// of intentional as there's not currently a use case for that.
ty::Int(i) => i.bit_width().unwrap(),
ty::Uint(i) => i.bit_width().unwrap(),
ty::Int(i) => i.bit_width().unwrap() as u64,
ty::Uint(i) => i.bit_width().unwrap() as u64,
_ => return_error!("`{}` is not an integral type", in_ty),
};
require_simd!(arg_tys[1], "argument");
Expand All @@ -1116,7 +1117,7 @@ fn generic_simd_intrinsic(
m_len, v_len
);
let i1 = bx.type_i1();
let i1xn = bx.type_vector(i1, m_len as u64);
let i1xn = bx.type_vector(i1, m_len);
let m_i1s = bx.bitcast(args[0].immediate(), i1xn);
return Ok(bx.select(m_i1s, args[1].immediate(), args[2].immediate()));
}
Expand Down Expand Up @@ -1166,7 +1167,7 @@ fn generic_simd_intrinsic(
require_simd!(ret_ty, "return");

let out_len = ret_ty.simd_size(tcx);
require!(out_len == n,
require!(out_len == n as u64,
"expected return type of length {}, found `{}` with length {}",
n, ret_ty, out_len);
require!(in_elem == ret_ty.simd_type(tcx),
Expand Down Expand Up @@ -1251,7 +1252,7 @@ fn generic_simd_intrinsic(
// trailing bits.
let expected_int_bits = in_len.max(8);
match ret_ty.kind {
ty::Uint(i) if i.bit_width() == Some(expected_int_bits) => (),
ty::Uint(i) if i.bit_width() == Some(expected_int_bits as usize) => (),
_ => return_error!(
"bitmask `{}`, expected `u{}`",
ret_ty, expected_int_bits
Expand All @@ -1276,7 +1277,8 @@ fn generic_simd_intrinsic(

// Shift the MSB to the right by "in_elem_bitwidth - 1" into the first bit position.
let shift_indices = vec![
bx.cx.const_int(bx.type_ix(in_elem_bitwidth as _), (in_elem_bitwidth - 1) as _); in_len
bx.cx.const_int(bx.type_ix(in_elem_bitwidth as _), (in_elem_bitwidth - 1) as _);
in_len as _
];
let i_xn_msb = bx.lshr(i_xn, bx.const_vector(shift_indices.as_slice()));
// Truncate vector to an <i1 x N>
Expand All @@ -1291,7 +1293,7 @@ fn generic_simd_intrinsic(
name: &str,
in_elem: &::rustc::ty::TyS<'_>,
in_ty: &::rustc::ty::TyS<'_>,
in_len: usize,
in_len: u64,
bx: &mut Builder<'a, 'll, 'tcx>,
span: Span,
args: &[OperandRef<'tcx, &'ll Value>],
Expand Down Expand Up @@ -1506,11 +1508,12 @@ fn generic_simd_intrinsic(
// Truncate the mask vector to a vector of i1s:
let (mask, mask_ty) = {
let i1 = bx.type_i1();
let i1xn = bx.type_vector(i1, in_len as u64);
let i1xn = bx.type_vector(i1, in_len);
(bx.trunc(args[2].immediate(), i1xn), i1xn)
};

// Type of the vector of pointers:
let in_len = usize::try_from(in_len).unwrap();
let llvm_pointer_vec_ty = llvm_vector_ty(bx, underlying_ty, in_len, pointer_count);
let llvm_pointer_vec_str = llvm_vector_str(underlying_ty, in_len, pointer_count);

Expand Down Expand Up @@ -1606,13 +1609,14 @@ fn generic_simd_intrinsic(
// Truncate the mask vector to a vector of i1s:
let (mask, mask_ty) = {
let i1 = bx.type_i1();
let i1xn = bx.type_vector(i1, in_len as u64);
let i1xn = bx.type_vector(i1, in_len);
(bx.trunc(args[2].immediate(), i1xn), i1xn)
};

let ret_t = bx.type_void();

// Type of the vector of pointers:
let in_len = usize::try_from(in_len).unwrap();
let llvm_pointer_vec_ty = llvm_vector_ty(bx, underlying_ty, in_len, pointer_count);
let llvm_pointer_vec_str = llvm_vector_str(underlying_ty, in_len, pointer_count);

Expand Down
3 changes: 1 addition & 2 deletions src/librustc_mir/interpret/intrinsics.rs
Original file line number Diff line number Diff line change
Expand Up @@ -306,7 +306,6 @@ impl<'mir, 'tcx, M: Machine<'mir, 'tcx>> InterpCx<'mir, 'tcx, M> {
let elem = args[2];
let input = args[0];
let (len, e_ty) = input.layout.ty.simd_size_and_type(self.tcx.tcx);
let len = len as u64;
assert!(
index < len,
"Index `{}` must be in bounds of vector type `{}`: `[0, {})`",
Expand Down Expand Up @@ -337,7 +336,7 @@ impl<'mir, 'tcx, M: Machine<'mir, 'tcx>> InterpCx<'mir, 'tcx, M> {
let index = u64::from(self.read_scalar(args[1])?.to_u32()?);
let (len, e_ty) = args[0].layout.ty.simd_size_and_type(self.tcx.tcx);
assert!(
index < len as u64,
index < len,
"index `{}` is out-of-bounds of vector type `{}` with length `{}`",
index, e_ty, len
);
Expand Down