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Add tier-3 support for powerpc64 and riscv64 openbsd #101025

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Merged
merged 3 commits into from
Aug 31, 2022
Merged

Add tier-3 support for powerpc64 and riscv64 openbsd #101025

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908ac84
openbsd: rustc_target: reorder spec by name
semarie Aug 26, 2022
dacb6ee
add powerpc64-unknown-openbsd support
semarie Aug 28, 2022
1de5b22
add riscv64gc-unknown-openbsd support (target riscv64-unknown-openbsd…
semarie Aug 28, 2022
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add powerpc64-unknown-openbsd support
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@semarie
semarie committed Aug 28, 2022
commit dacb6ee7b00fcd46f1a0e17dae2c81c7580843e4
1 change: 1 addition & 0 deletions compiler/rustc_target/src/spec/mod.rs
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Expand Up @@ -894,6 +894,7 @@ supported_targets! {
("aarch64-unknown-openbsd", aarch64_unknown_openbsd),
("i686-unknown-openbsd", i686_unknown_openbsd),
("powerpc-unknown-openbsd", powerpc_unknown_openbsd),
("powerpc64-unknown-openbsd", powerpc64_unknown_openbsd),
("sparc64-unknown-openbsd", sparc64_unknown_openbsd),
("x86_64-unknown-openbsd", x86_64_unknown_openbsd),

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17 changes: 17 additions & 0 deletions compiler/rustc_target/src/spec/powerpc64_unknown_openbsd.rs
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@@ -0,0 +1,17 @@
use crate::abi::Endian;
use crate::spec::{LinkerFlavor, Target, TargetOptions};

pub fn target() -> Target {
let mut base = super::openbsd_base::opts();
base.cpu = "ppc64".into();
base.add_pre_link_args(LinkerFlavor::Gcc, &["-m64"]);
base.max_atomic_width = Some(64);

Target {
llvm_target: "powerpc64-unknown-openbsd".into(),
pointer_width: 64,
data_layout: "E-m:e-i64:64-n32:64".into(),
arch: "powerpc64".into(),
options: TargetOptions { endian: Endian::Big, mcount: "_mcount".into(), ..base },
}
}
1 change: 1 addition & 0 deletions src/doc/rustc/src/platform-support.md
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Expand Up @@ -277,6 +277,7 @@ target | std | host | notes
`powerpc64-unknown-linux-musl` | ? | |
`powerpc64-wrs-vxworks` | ? | |
`powerpc64le-unknown-linux-musl` | ? | |
[`powerpc64-unknown-openbsd`](platform-support/openbsd.md) | ✓ | ✓ | OpenBSD/powerpc64
`riscv32gc-unknown-linux-gnu` | | | RISC-V Linux (kernel 5.4, glibc 2.33)
`riscv32gc-unknown-linux-musl` | | | RISC-V Linux (kernel 5.4, musl + RISCV32 support patches)
`riscv32im-unknown-none-elf` | * | | Bare RISC-V (RV32IM ISA)
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1 change: 1 addition & 0 deletions src/doc/rustc/src/platform-support/openbsd.md
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Expand Up @@ -12,6 +12,7 @@ The target names follow this format: `$ARCH-unknown-openbsd`, where `$ARCH` spec
|--------------------------------|-------------|------------------|
| `aarch64-unknown-openbsd` | libc++ | [64-bit ARM systems](https://www.openbsd.org/arm64.html) |
| `i686-unknown-openbsd` | libc++ | [Standard PC and clones based on the Intel i386 architecture and compatible processors](https://www.openbsd.org/i386.html) |
| `powerpc64-unknown-openbsd` | libc++ | [IBM POWER-based PowerNV systems](https://www.openbsd.org/powerpc64.html) |
| `sparc64-unknown-openbsd` | estdc++ | [Sun UltraSPARC and Fujitsu SPARC64 systems](https://www.openbsd.org/sparc64.html) |
| `x86_64-unknown-openbsd` | libc++ | [AMD64-based systems](https://www.openbsd.org/amd64.html) |

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