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2 changes: 1 addition & 1 deletion README.md
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ Currently, vectors may have up to 64 elements, but aliases are provided only up
Depending on the size of the primitive type, the number of lanes the vector will have varies. For example, 128-bit vectors have four `f32` lanes and two `f64` lanes.

The supported element types are as follows:
* **Floating Point:** `f32`, `f64`
* **Floating Point:** `f16`, `f32`, `f64`
* **Signed Integers:** `i8`, `i16`, `i32`, `i64`, `isize` (`i128` excluded)
* **Unsigned Integers:** `u8`, `u16`, `u32`, `u64`, `usize` (`u128` excluded)
* **Pointers:** `*const T` and `*mut T` (zero-sized metadata only)
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10 changes: 10 additions & 0 deletions crates/core_simd/src/alias.rs
Original file line number Diff line number Diff line change
Expand Up @@ -153,6 +153,16 @@ alias! {
usizex64 64
}

f16 = {
f16x1 1
f16x2 2
f16x4 4
f16x8 8
f16x16 16
f16x32 32
f16x64 64
}

f32 = {
f32x1 1
f32x2 2
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3 changes: 3 additions & 0 deletions crates/core_simd/src/cast.rs
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,9 @@ impl SimdCast for u64 {}
unsafe impl Sealed for usize {}
impl SimdCast for usize {}
// Safety: primitive number types can be cast to other primitive number types
unsafe impl Sealed for f16 {}
impl SimdCast for f16 {}
// Safety: primitive number types can be cast to other primitive number types
unsafe impl Sealed for f32 {}
impl SimdCast for f32 {}
// Safety: primitive number types can be cast to other primitive number types
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1 change: 1 addition & 0 deletions crates/core_simd/src/iter.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,7 @@ macro_rules! impl_traits {
}
}

impl_traits! { f16 }
impl_traits! { f32 }
impl_traits! { f64 }
impl_traits! { u8 }
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15 changes: 14 additions & 1 deletion crates/core_simd/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,8 @@
staged_api,
prelude_import,
ptr_metadata,
rustc_attrs
rustc_attrs,
f16
)]
#![cfg_attr(
all(
Expand All @@ -35,6 +36,18 @@
all(target_arch = "x86_64", target_feature = "avx512f"),
feature(stdarch_x86_avx512)
)]
#![cfg_attr(
any(target_arch = "x86", target_arch = "x86_64"),
feature(stdarch_x86_avx512_f16)
)]
#![cfg_attr(
any(
target_arch = "aarch64",
target_arch = "arm64ec",
all(target_arch = "arm", target_feature = "v7"),
),
feature(stdarch_neon_f16)
)]
#![warn(missing_docs, clippy::missing_inline_in_public_items)] // basically all items, really
#![deny(
unsafe_op_in_unsafe_fn,
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2 changes: 1 addition & 1 deletion crates/core_simd/src/ops.rs
Original file line number Diff line number Diff line change
Expand Up @@ -245,7 +245,7 @@ for_base_ops! {
// We don't need any special precautions here:
// Floats always accept arithmetic ops, but may become NaN.
for_base_ops! {
T = (f32, f64);
T = (f16, f32, f64);
type Lhs = Simd<T, N>;
type Rhs = Simd<T, N>;
type Output = Self;
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2 changes: 2 additions & 0 deletions crates/core_simd/src/ops/unary.rs
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,8 @@ macro_rules! neg {
}

neg! {
impl<const N: usize> Neg for Simd<f16, N>

impl<const N: usize> Neg for Simd<f32, N>

impl<const N: usize> Neg for Simd<f64, N>
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2 changes: 1 addition & 1 deletion crates/core_simd/src/simd/cmp/eq.rs
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@ macro_rules! impl_number {
}
}

impl_number! { f32, f64, u8, u16, u32, u64, usize, i8, i16, i32, i64, isize }
impl_number! { f16, f32, f64, u8, u16, u32, u64, usize, i8, i16, i32, i64, isize }

macro_rules! impl_mask {
{ $($integer:ty),* } => {
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2 changes: 1 addition & 1 deletion crates/core_simd/src/simd/cmp/ord.rs
Original file line number Diff line number Diff line change
Expand Up @@ -144,7 +144,7 @@ macro_rules! impl_float {
}
}

impl_float! { f32, f64 }
impl_float! { f16, f32, f64 }

macro_rules! impl_mask {
{ $($integer:ty),* } => {
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2 changes: 1 addition & 1 deletion crates/core_simd/src/simd/num/float.rs
Original file line number Diff line number Diff line change
Expand Up @@ -444,4 +444,4 @@ macro_rules! impl_trait {
}
}

impl_trait! { f32 { bits: u32, mask: i32 }, f64 { bits: u64, mask: i64 } }
impl_trait! { f16 { bits: u16, mask: i16}, f32 { bits: u32, mask: i32 }, f64 { bits: u64, mask: i64 } }
4 changes: 4 additions & 0 deletions crates/core_simd/src/simd/prelude.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,10 @@ pub use super::{
simd_swizzle,
};

#[rustfmt::skip]
#[doc(no_inline)]
pub use super::{f16x1, f16x2, f16x4, f16x8, f16x16, f16x32, f16x64};

#[rustfmt::skip]
#[doc(no_inline)]
pub use super::{f32x1, f32x2, f32x4, f32x8, f32x16, f32x32, f32x64};
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2 changes: 2 additions & 0 deletions crates/core_simd/src/to_bytes.rs
Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,7 @@ pub trait ToBytes: Sealed {
}

macro_rules! swap_bytes {
{ f16, $x:expr } => { Simd::from_bits($x.to_bits().swap_bytes()) };
{ f32, $x:expr } => { Simd::from_bits($x.to_bits().swap_bytes()) };
{ f64, $x:expr } => { Simd::from_bits($x.to_bits().swap_bytes()) };
{ $ty:ty, $x:expr } => { $x.swap_bytes() }
Expand Down Expand Up @@ -141,5 +142,6 @@ impl_to_bytes! { isize, 4 }
#[cfg(target_pointer_width = "64")]
impl_to_bytes! { isize, 8 }

impl_to_bytes! { f16, 2 }
impl_to_bytes! { f32, 4 }
impl_to_bytes! { f64, 8 }
7 changes: 7 additions & 0 deletions crates/core_simd/src/vector.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1153,6 +1153,13 @@ unsafe impl SimdElement for isize {
type Mask = isize;
}

impl Sealed for f16 {}

// Safety: f16 is a valid SIMD element type, and is supported by this API
unsafe impl SimdElement for f16 {
type Mask = i16;
}

impl Sealed for f32 {}

// Safety: f32 is a valid SIMD element type, and is supported by this API
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3 changes: 3 additions & 0 deletions crates/core_simd/src/vendor/arm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,9 @@ use core::arch::aarch64::*;
mod neon {
use super::*;

from_transmute! { unsafe f16x4 => float16x4_t }
from_transmute! { unsafe f16x8 => float16x8_t }

from_transmute! { unsafe f32x2 => float32x2_t }
from_transmute! { unsafe f32x4 => float32x4_t }

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3 changes: 3 additions & 0 deletions crates/core_simd/src/vendor/x86.rs
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,9 @@ from_transmute! { unsafe u16x32 => __m512i }
from_transmute! { unsafe i16x8 => __m128i }
from_transmute! { unsafe i16x16 => __m256i }
from_transmute! { unsafe i16x32 => __m512i }
from_transmute! { unsafe f16x8 => __m128h }
from_transmute! { unsafe f16x16 => __m256h }
from_transmute! { unsafe f16x32 => __m512h }

from_transmute! { unsafe u32x4 => __m128i }
from_transmute! { unsafe u32x8 => __m256i }
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17 changes: 17 additions & 0 deletions crates/std_float/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
feature = "as_crate",
feature(core_intrinsics),
feature(portable_simd),
feature(f16),
allow(internal_features)
)]
#[cfg(not(feature = "as_crate"))]
Expand Down Expand Up @@ -140,13 +141,29 @@ pub trait StdFloat: Sealed + Sized {
fn fract(self) -> Self;
}

impl<const N: usize> Sealed for Simd<f16, N> {}
impl<const N: usize> Sealed for Simd<f32, N> {}
impl<const N: usize> Sealed for Simd<f64, N> {}

macro_rules! impl_float {
{
$($fn:ident: $intrinsic:ident,)*
} => {
impl<const N: usize> StdFloat for Simd<f16, N>
{
#[inline]
fn fract(self) -> Self {
self - self.trunc()
}

$(
#[inline]
fn $fn(self) -> Self {
unsafe { intrinsics::$intrinsic(self) }
}
)*
}

impl<const N: usize> StdFloat for Simd<f32, N>
{
#[inline]
Expand Down