Prepare for renaming riscv-pac to riscv-types

.github/workflows/changelog.yaml

@@ -29,6 +29,8 @@ jobs:
               - 'riscv-semihosting/**'
             riscv-target-parser:
               - 'riscv-target-parser/**'
+            riscv-types:
+              - 'riscv-types/**'
 
       - name: Check for CHANGELOG.md (riscv)
         if: steps.changes.outputs.riscv == 'true'
@@ -77,3 +79,11 @@ jobs:
           changeLogPath: ./riscv-target-parser/CHANGELOG.md
           skipLabels: 'skip changelog'
           missingUpdateErrorMessage: 'Please add a changelog entry in the riscv-target-parser/CHANGELOG.md file.'
+
+      - name: Check for CHANGELOG.md (riscv-types)
+        if: steps.changes.outputs.riscv-types == 'true'
+        uses: dangoslen/changelog-enforcer@v3
+        with:
+          changeLogPath: ./riscv-types/CHANGELOG.md
+          skipLabels: 'skip changelog'
+          missingUpdateErrorMessage: 'Please add a changelog entry in the riscv-types/CHANGELOG.md file.'

Cargo.toml

@@ -7,6 +7,7 @@ members = [
     "riscv-rt",
     "riscv-semihosting",
     "riscv-target-parser",
+    "riscv-types",
     "tests-build",
     "tests-trybuild",
 ]
@@ -17,4 +18,5 @@ default-members = [
     "riscv-peripheral",
     "riscv-rt",
     "riscv-semihosting",
+    "riscv-types",
 ]

riscv-types/CHANGELOG.md

@@ -0,0 +1,39 @@
+# Change Log
+
+All notable changes to this project will be documented in this file.
+
+The format is based on [Keep a Changelog](http://keepachangelog.com/)
+and this project adheres to [Semantic Versioning](http://semver.org/).
+
+## [Unreleased]
+
+### Changed
+
+- Renamed crate to `riscv-types` as per [#351](https://github.com/rust-embedded/riscv/issues/351)
+
+## riscv-pac [v0.2.0] - 2024-10-19
+
+### Added
+
+- Add `result` module for `Error` and `Result` types
+- Add `ExceptionNumber` trait.
+- Classify interrupt numbers in `CoreInterruptNumber` and `ExternalInterruptNumber`.
+- Added simple tests to illustrate how to implement all the provided traits.
+
+### Changed 
+
+- All traits now work with `usize` data type.
+
+## riscv-pac [v0.1.1] - 2024-02-15
+
+- Fix crates.io badge links
+
+## riscv-pac [v0.1.0] - 2024-01-14
+
+### Added
+
+- Add `InterruptNumber`, `PriorityNumber`, and `HartIdNumber` traits.
+
+### Changed
+
+- Update `README.md`

riscv-types/Cargo.toml

@@ -0,0 +1,19 @@
+[package]
+name = "riscv-types"
+version = "0.1.0"
+edition = "2021"
+rust-version = "1.60"
+repository = "https://github.com/rust-embedded/riscv"
+authors = ["The RISC-V Team <risc-v@teams.rust-embedded.org>"]
+categories = ["embedded", "hardware-support", "no-std"]
+description = "Low level access to RISC-V processors"
+documentation = "https://docs.rs/riscv-types"
+keywords = ["riscv", "register", "peripheral"]
+license = "ISC"
+
+[package.metadata.docs.rs]
+default-target = "riscv64imac-unknown-none-elf"
+targets = [
+    "riscv32i-unknown-none-elf", "riscv32imc-unknown-none-elf", "riscv32imac-unknown-none-elf",
+    "riscv64imac-unknown-none-elf", "riscv64gc-unknown-none-elf",
+]

riscv-types/README.md

@@ -0,0 +1,40 @@
+[![crates.io](https://img.shields.io/crates/d/riscv-types.svg)](https://crates.io/crates/riscv-types)
+[![crates.io](https://img.shields.io/crates/v/riscv-types.svg)](https://crates.io/crates/riscv-types)
+
+# `riscv-types` (previously `riscv-pac`)
+
+> Target-specific traits to be implemented by PACs
+
+This project is developed and maintained by the [RISC-V team][team].
+
+## [Documentation](https://docs.rs/crate/riscv-types)
+
+## Minimum Supported Rust Version (MSRV)
+
+This crate is guaranteed to compile on stable Rust 1.60 and up. It *might*
+compile with older versions but that may change in any new patch release.
+
+## License
+
+Copyright 2023-2025 [RISC-V team][team]
+
+Permission to use, copy, modify, and/or distribute this software for any purpose
+with or without fee is hereby granted, provided that the above copyright notice
+and this permission notice appear in all copies.
+
+THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
+REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND
+FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
+INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS
+OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
+THIS SOFTWARE.
+
+## Code of Conduct
+
+Contribution to this crate is organized under the terms of the [Rust Code of
+Conduct][CoC], the maintainer of this crate, the [RISC-V team][team], promises
+to intervene to uphold that code of conduct.
+
+[CoC]: ../CODE_OF_CONDUCT.md
+[team]: https://github.com/rust-embedded/wg#the-risc-v-team