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bus/i2c: add RefCell, CriticalSection and Mutex shared bus implementations. #445
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Original file line number | Diff line number | Diff line change |
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use core::cell::RefCell; | ||
use critical_section::Mutex; | ||
use embedded_hal::i2c::{ErrorType, I2c}; | ||
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/// `critical-section`-based shared bus [`I2c`] implementation. | ||
/// | ||
/// Sharing is implemented with a `critical-section` [`Mutex`](critical_section::Mutex). A critical section is taken for | ||
/// the entire duration of a transaction. This allows sharing a single bus across multiple threads (interrupt priority levels). | ||
/// The downside is critical sections typically require globally disabling interrupts, so `CriticalSectionDevice` will likely | ||
/// negatively impact real-time properties, such as interrupt latency. If you can, prefer using | ||
/// [`RefCellDevice`](super::RefCellDevice) instead, which does not require taking critical sections. | ||
pub struct CriticalSectionDevice<'a, T> { | ||
bus: &'a Mutex<RefCell<T>>, | ||
} | ||
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impl<'a, T> CriticalSectionDevice<'a, T> { | ||
/// Create a new `CriticalSectionDevice` | ||
pub fn new(bus: &'a Mutex<RefCell<T>>) -> Self { | ||
Self { bus } | ||
} | ||
} | ||
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impl<'a, T> ErrorType for CriticalSectionDevice<'a, T> | ||
where | ||
T: I2c, | ||
{ | ||
type Error = T::Error; | ||
} | ||
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impl<'a, T> I2c for CriticalSectionDevice<'a, T> | ||
where | ||
T: I2c, | ||
{ | ||
fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { | ||
critical_section::with(|cs| { | ||
let bus = &mut *self.bus.borrow_ref_mut(cs); | ||
bus.read(address, read) | ||
}) | ||
} | ||
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fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { | ||
critical_section::with(|cs| { | ||
let bus = &mut *self.bus.borrow_ref_mut(cs); | ||
bus.write(address, write) | ||
}) | ||
} | ||
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fn write_read( | ||
&mut self, | ||
address: u8, | ||
write: &[u8], | ||
read: &mut [u8], | ||
) -> Result<(), Self::Error> { | ||
critical_section::with(|cs| { | ||
let bus = &mut *self.bus.borrow_ref_mut(cs); | ||
bus.write_read(address, write, read) | ||
}) | ||
} | ||
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fn transaction( | ||
&mut self, | ||
address: u8, | ||
operations: &mut [embedded_hal::i2c::Operation<'_>], | ||
) -> Result<(), Self::Error> { | ||
critical_section::with(|cs| { | ||
let bus = &mut *self.bus.borrow_ref_mut(cs); | ||
bus.transaction(address, operations) | ||
}) | ||
} | ||
} |
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//! `I2c` shared bus implementations. | ||
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mod refcell; | ||
pub use refcell::*; | ||
#[cfg(feature = "std")] | ||
mod mutex; | ||
#[cfg(feature = "std")] | ||
pub use mutex::*; | ||
mod critical_section; | ||
pub use self::critical_section::*; |
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use embedded_hal::i2c::{ErrorType, I2c}; | ||
use std::sync::Mutex; | ||
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/// `std` `Mutex`-based shared bus [`I2c`] implementation. | ||
/// | ||
/// Sharing is implemented with an `std` [`Mutex`](std::sync::Mutex). It allows a single bus across multiple threads, | ||
/// with finer-grained locking than [`CriticalSectionDevice`](super::CriticalSectionDevice). The downside is that | ||
/// it is only available in `std` targets. | ||
pub struct MutexDevice<'a, T> { | ||
bus: &'a Mutex<T>, | ||
} | ||
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impl<'a, T> MutexDevice<'a, T> { | ||
/// Create a new `MutexDevice` | ||
pub fn new(bus: &'a Mutex<T>) -> Self { | ||
Self { bus } | ||
} | ||
} | ||
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impl<'a, T> ErrorType for MutexDevice<'a, T> | ||
where | ||
T: I2c, | ||
{ | ||
type Error = T::Error; | ||
} | ||
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impl<'a, T> I2c for MutexDevice<'a, T> | ||
where | ||
T: I2c, | ||
{ | ||
fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { | ||
let bus = &mut *self.bus.lock().unwrap(); | ||
bus.read(address, read) | ||
} | ||
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fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { | ||
let bus = &mut *self.bus.lock().unwrap(); | ||
bus.write(address, write) | ||
} | ||
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fn write_read( | ||
&mut self, | ||
address: u8, | ||
write: &[u8], | ||
read: &mut [u8], | ||
) -> Result<(), Self::Error> { | ||
let bus = &mut *self.bus.lock().unwrap(); | ||
bus.write_read(address, write, read) | ||
} | ||
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fn transaction( | ||
&mut self, | ||
address: u8, | ||
operations: &mut [embedded_hal::i2c::Operation<'_>], | ||
) -> Result<(), Self::Error> { | ||
let bus = &mut *self.bus.lock().unwrap(); | ||
bus.transaction(address, operations) | ||
} | ||
} |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,59 @@ | ||
use core::cell::RefCell; | ||
use embedded_hal::i2c::{ErrorType, I2c}; | ||
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/// `RefCell`-based shared bus [`I2c`] implementation. | ||
/// | ||
/// Sharing is implemented with a `RefCell`. This means it has low overhead, but `RefCellDevice` instances are not `Send`, | ||
/// so it only allows sharing within a single thread (interrupt priority level). If you need to share a bus across several | ||
/// threads, use [`CriticalSectionDevice`](super::CriticalSectionDevice) instead. | ||
pub struct RefCellDevice<'a, T> { | ||
bus: &'a RefCell<T>, | ||
} | ||
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impl<'a, T> RefCellDevice<'a, T> { | ||
/// Create a new `RefCellDevice` | ||
pub fn new(bus: &'a RefCell<T>) -> Self { | ||
Self { bus } | ||
} | ||
} | ||
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impl<'a, T> ErrorType for RefCellDevice<'a, T> | ||
where | ||
T: I2c, | ||
{ | ||
type Error = T::Error; | ||
} | ||
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impl<'a, T> I2c for RefCellDevice<'a, T> | ||
where | ||
T: I2c, | ||
{ | ||
fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { | ||
let bus = &mut *self.bus.borrow_mut(); | ||
bus.read(address, read) | ||
} | ||
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fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { | ||
let bus = &mut *self.bus.borrow_mut(); | ||
bus.write(address, write) | ||
} | ||
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fn write_read( | ||
&mut self, | ||
address: u8, | ||
write: &[u8], | ||
read: &mut [u8], | ||
) -> Result<(), Self::Error> { | ||
let bus = &mut *self.bus.borrow_mut(); | ||
bus.write_read(address, write, read) | ||
} | ||
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fn transaction( | ||
&mut self, | ||
address: u8, | ||
operations: &mut [embedded_hal::i2c::Operation<'_>], | ||
) -> Result<(), Self::Error> { | ||
let bus = &mut *self.bus.borrow_mut(); | ||
bus.transaction(address, operations) | ||
} | ||
} |
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@@ -1,17 +1,6 @@ | ||
//! Bus/Device connection mechanisms for [`embedded-hal`], a Hardware Abstraction Layer (HAL) for embedded systems. | ||
//! | ||
//! It is possible to connect several peripherals to a bus like SPI or I2C. | ||
//! To support this, `embedded-hal` provides the `SpiBus` and `SpiDevice` traits in the case of SPI, for example. | ||
//! | ||
//! `embedded-hal` trait implementations for microcontrollers should implement the `...Bus` traits. | ||
//! However, device drivers should use the `...Device` traits, _not the `...Bus` traits_ if at all possible | ||
//! in order to allow for sharing of the bus they are connected to. | ||
//! | ||
//! This crate provides mechanisms to connect a `...Bus` and a `...Device`. | ||
//! | ||
//! For further details on these traits, please consult the [`embedded-hal` documentation](https://docs.rs/embedded-hal). | ||
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#![doc = include_str!("../README.md")] | ||
#![warn(missing_docs)] | ||
#![no_std] | ||
#![cfg_attr(not(feature = "std"), no_std)] | ||
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pub mod i2c; | ||
pub mod spi; |
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