TPSim (Timing and Power Simulator) is a gate-level simulator with timing and power estimation capabilities. It receives a combinatorial Verilog netlist as input and simulates the circuit in an event-driven fashion, using pre-characterized look-up tables to estimate events' delay, energy, and other parameters.
This project mainly depends on Boost (>= 1.80.0). The Verilog parser depends on Flex and Bison. The project also uses Catch2 as the testing framework. On Ubuntu, these libraries can be installed through the following command:
sudo apt install libboost-all-dev flex bison- Navigate to the project folder
cd TPSim - Invoke CMake to create the build directory and generate Makefiles
cmake -S . -B build - Invoke CMake to build the project
cmake --build build
Usage:
./tpsim <verilog file> -s <stimuli file> -l <library file> [options]Use the flag --help or -h to display all the options.
Tests can be executed through ctest or the compiled binary ./test.