Merge pull request #10 from ved-rivos/wrs_nto_info_note

adding note recommended by AR

zawrs.adoc

@@ -55,4 +55,11 @@ The duration of a `WRS.STO` instruction's timeout may vary significantly within
 and among implementations. In typical implementations this duration should be 
 roughly in the range of 10 to 100 times an on-chip cache miss latency or a 
 cacheless access to main memory.
+
+`WRS.NTO`, unlike `WFI`, is not specified to cause an illegal instruction
+exception if executed in U-mode when the governing `TW` bit is 0. `WFI` is
+typically not expected to be used in U-mode and on many systems may promptly
+cause an illegal instruction exception if used at U-mode. Unlike `WFI`,
+`WRS.NTO` is expected to be used by software in U-mode when waiting on
+memory but without itself having a deadline for that wait to complete.
 ====