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Vector AES Mock SAIL code. #24

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ben-marshall opened this issue Aug 3, 2020 · 2 comments
Closed
8 of 14 tasks

Vector AES Mock SAIL code. #24

ben-marshall opened this issue Aug 3, 2020 · 2 comments
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help wanted Extra attention is needed SAIL Anything to do with the SAIL formal model. specification Improvements or additions to the specification

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@ben-marshall
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ben-marshall commented Aug 3, 2020

Write mocked SAIL descriptions of the vector AES instructions. Because there is no support for the base vector extension, these functions assume that extraction of input elements from the vector registers is a solved problem and that they are just passed in as arguments. The mocked functions just return the result for a single set of elements. They do not change any architectural state.

AES 128 Single Round:

  • AES 128 KSE Single Round
  • AES 128 KSD Single Round
  • AES 128 ENC Single Round
  • AES 128 DEC Single Round

AES 128 All Round:

  • AES 128 KS All Rounds
  • AES 128 ENC All Rounds
  • AES 128 DEC All Rounds

AES 256 Single Round:

  • AES 256 KSE Single Round
  • AES 256 KSD Single Round
  • AES 256 ENC Single Round
  • AES 256 DEC Single Round

AES 256 All Round:

  • AES 256 KSE All Rounds
  • AES 256 ENC All Rounds
  • AES 256 DEC All Rounds
@ben-marshall ben-marshall added the specification Improvements or additions to the specification label Aug 3, 2020
@ben-marshall ben-marshall changed the title Vector AES Pseudo code. Vector AES Mock SAIL code. Aug 13, 2020
@ben-marshall ben-marshall added help wanted Extra attention is needed SAIL Anything to do with the SAIL formal model. labels Aug 13, 2020
ben-marshall added a commit that referenced this issue Aug 14, 2020
- Added some mock functions for vector extension register access and
  constant access.

  - Get/Set elements of 128 bits

  - Get number of elements to work on.

- See #24, #26

 On branch dev/next-release
 Your branch is ahead of 'origin/dev/next-release' by 4 commits.
   (use "git push" to publish your local commits)

 Changes to be committed:
	modified:   sail/riscv_types_crypto.sail

 Changes not staged for commit:
	modified:   bin/parse_opcodes.py
	modified:   extern/riscv-gnu-toolchain (modified content)
	modified:   extern/riscv-isa-sim (modified content)

 Untracked files:
	sail/riscv_insts_crypto_rvv_aes.sail
	sail/riscv_insts_crypto_rvv_alu.sail
	sail/riscv_insts_crypto_rvv_sha.sail
ben-marshall added a commit that referenced this issue Aug 14, 2020
- See #25, #24

- Boilerplate for all vector AES instrucitons.

- Mock code for single round AES instructions.

 On branch dev/next-release
 Your branch is ahead of 'origin/dev/next-release' by 8 commits.
   (use "git push" to publish your local commits)

 Changes to be committed:
	new file:   sail/riscv_insts_crypto_rvv_aes.sail

 Changes not staged for commit:
	modified:   extern/riscv-gnu-toolchain (modified content)
	modified:   extern/riscv-isa-sim (modified content)
@ben-marshall ben-marshall self-assigned this Aug 19, 2020
@ben-marshall ben-marshall mentioned this issue Aug 19, 2020
21 tasks
ben-marshall added a commit that referenced this issue Aug 19, 2020
- See #24

 On branch dev/next-release
 Your branch is up-to-date with 'origin/dev/next-release'.

 Changes to be committed:
	modified:   sail/riscv_crypto_tests.sail
	modified:   sail/riscv_insts_crypto_rvv_aes.sail
	modified:   sail/riscv_types_crypto.sail

 Changes not staged for commit:
	modified:   extern/riscv-gnu-toolchain (modified content)
	modified:   extern/riscv-isa-sim (modified content)
ben-marshall added a commit that referenced this issue Aug 27, 2020
- Tests for key schedule step: AES128/256
- Tests for single round encrypt.
- Tests for round transformations.
- Tests for getting last round keys from initial cipher key: AES 128/256
- Implement get last round key: AES 128/256

 On branch dev/next-release
 Your branch is up-to-date with 'origin/dev/next-release'.

 Changes to be committed:
	modified:   sail/riscv_crypto_tests.sail
	modified:   sail/riscv_insts_crypto_rvv_aes.sail
	modified:   sail/riscv_types_crypto.sail

 Changes not staged for commit:
	modified:   extern/riscv-gnu-toolchain (modified content)
	modified:   extern/riscv-isa-sim (modified content)
@infini8-13
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Hey @ben-marshall, this seems interesting and I would like to take up on it. I have experience with AES and DES implementations in Verilog and quite familiar with RISCV ISA. Where do I start for the SAIL model?

@kdockser
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Until the Sail model for RISC-V Vector is complete, we cannot add in modifications to SAIL needed for Vector Crypto. Instead, the specification will continue to use SAIL-like code in the fashion that Ben had created.

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