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Description
Technical Group
Golden Model SIG
ratification-pkg
Zihintpause
Technical Liaison
Prashanth Mundkur
Task Category
SAIL model
Task Sub Category
- gcc
- binutils
- gdb
- intrinsics
- Java
- KVM
- ld
- llvm
- Linux kernel
- QEMU
- Spike
Ratification Target
Already Ratified
spec-link
https://drive.google.com/file/d/1uviu1nH-tScFfgrovvFCrj7Omv8tFtkp/view
Statement of Work (SOW)
Component names:
RISC-V Sail Model
Requirements:
The PAUSE instruction is a HINT that indicates the current hart’s rate of instruction retirement
should be temporarily reduced or paused. The duration of its effect must be bounded and may be
zero.
Sail support for this hint has not yet been created. This SOW delivers extension support for the Zihintpause in the Sail model, including command line configuration and build verification tests.
See Chapter 10 "'Zihintpause' Extensions for Pause Hint, Version 2.0" in the The RISC-V Instruction Set: Manual Volume I specification for details about the extension.
NOTE: Per the comment from Jordan Carlin below, this work should wait until the new module system (riscv/sail-riscv#572) is merged to that it will simplify the overriding of existing encoding. It should also wait for the Zicbop Sail PR #538 to demonstrate the enablement technique.
Unprivileged Architecture
Deliverables:
- RISC-V Sail model changes accepted into community for extension
- RISC-V Sail model build verification tests written for extension and accepted into community
Acceptance Criteria:
- PR(s) reviewed and accepted
- Build verification tests passing
- Passes any tests created in Architecture Compatibility Tests
SOW Signoffs: (delete those not needed)
- Task group liaison sign-off
- Development partner sign-off
- Golden Model SIG sign-off (if SAIL work)
Waiver
- Freeze
- Ratification
Pull Request Details
No response
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