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Description
Technical Group
Architecture Test SIG
ratification-pkg
all FP extensions
Technical Liaison
Allen Baum
Task Category
Arch Tests
Task Sub Category
- gcc
- binutils
- gdb
- intrinsics
- Java
- KVM
- ld
- llvm
- Linux kernel
- QEMU
- Spike
Ratification Target
Legacy
Statement of Work (SOW)
Component names:
D,F,Q, Zfh, Zfinx, Zdinx, Zhinx
Requirements:
Add directed test cases for FP ops that generate a normalized result, but also set the underflow flag
Origin
For an obscure IEEE FP reason, it is possible to generate a normalized FP result while still setting the underflow
flag. This is because the underflow is set after rounding – but for some corner cases, two roundings can occur.
This happens when a denormalized number , after rounding, becomes the largest denorm.
When converted to a denorm format, a second rounding (if the result is odd) occurs, which can round up and
overflow for some rounding modes, and it becomes normalized.
Test Details of Required Tests
For each FP op (FADD, FSUB, FMUL, FDIV, FSQRT, FMUL[N][ADD/SUB},
FCVT.S.D, FCVT.D.Q, FCVT.H.x
(any FPCVT from a longer FP format to a shorter FP format)
Choose operands that result in raw values for each FP format (before any rounding) of
EXP = -bias, (is 127 for single, 2047 for double, etc)
SGN= 0 and1
MANT = all 1s & all1-1 (including hidden bit) for each FP format
All 4 combinations of guard and sticky bits
Deliverables:
Since the real requirement is generation of an internal rounded result of all 1s, which is not architecturally visible, we can’t write the coverage except to verify the output is either the smallest normalized number or the largest denorm.
- Assembly language tests that meet the TestFormatSpec,
- Coverage models using riscv-ctg YAML formatted schema Acceptance criteria
Acceptance Criteria:
- Tests pass using the riscof framework
Projected timeframe: 3 months
SOW Signoffs: (delete those not needed)
- Task group liaison sign-off
- Development partner sign-off
- ACT SIG sign-off (if ACT work)
Waiver
- Freeze
- Ratification
Pull Request Details
TBD
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