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@tzerrell tzerrell commented Nov 5, 2024

Make use of the RSA acceleration from risc0/risc0#2481 when run in the RISC Zero guest.

Can't land until risc0/risc0#2481 lands.

@tzerrell tzerrell marked this pull request as ready for review November 6, 2024 19:12
@tzerrell tzerrell requested a review from flaub November 6, 2024 19:12
@@ -1,3 +1,4 @@
#[allow(unused_imports)]
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Wondering why we need this?

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My hypothesis was that upstream was only warning on unused_imports whereas the risc0 repo has it set to error. But I'm not very familiar with how Rust warning/error settings work so I'm not sure if this sort of cross-crate setting contamination can even happen.

@tzerrell tzerrell merged commit 555416e into risc0 Nov 7, 2024
@flaub flaub deleted the tzerrell/zirgen-accel branch November 7, 2024 20:47
austinabell added a commit that referenced this pull request Dec 13, 2024
Use the new RSA extern (#2)

---------

Co-authored-by: Frank Laub <github@frank.laub.io>
Use risc0-bigint2 (#3)

* Use risc0-bigint2

* Use num-bigint-dig feature

* Update lockfile

* Update ref

* Update ref

* Update git ref
Update bigint2 impl with 4096 bit support (#4)

* update acceleration to use latest version of bigint2 (with 4096 bit support)

* bump version

* bump to 1.2
austinabell added a commit that referenced this pull request Dec 13, 2024
* Add Zirgen-based acceleration (#1)

Use the new RSA extern (#2)

---------

Co-authored-by: Frank Laub <github@frank.laub.io>
Use risc0-bigint2 (#3)

* Use risc0-bigint2

* Use num-bigint-dig feature

* Update lockfile

* Update ref

* Update ref

* Update git ref
Update bigint2 impl with 4096 bit support (#4)

* update acceleration to use latest version of bigint2 (with 4096 bit support)

* bump version

* bump to 1.2

* gate prop tests behind cfg to enable cargo risczero test
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4 participants