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The absence of I2C functionality does not imply SMBus ability. Instead we check for required SMBus functionality and find the bus with the most SPD EEPROMs.

On my system the old code hits bus 3 and stops. The new code finds bus 6 with 0x50 and bus 1 with both 0x50 and 0x51, and correctly selects bus 1.

The absence of I2C functionality does not imply SMBus ability. Instead we check for required SMBus functionality and find the bus with the most SPD EEPROMs.

On my system the old code hits bus 3 and stops. The new code finds bus 6 with 0x50 and bus 1 with both 0x50 and 0x51, and correctly selects bus 1.
@Artoria2e5
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For what is worth: it succeeds with read but not with write, not surprising.

@Artoria2e5
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Huh. Perhaps the write can be done by parts so a user can choose to only mess with the extension parts like XMP. Might help with failures. Might try it next time I boot up nixos.

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