Iar develop (DO NOT MERGE)

CMakeLists.txt

@@ -9,6 +9,13 @@ if (NOT TARGET _pico_sdk_inclusion_marker)
 
     project(pico_sdk C CXX ASM)
 
+    string(REGEX MATCH "Clang" PICO_C_COMPILER_IS_CLANG "${CMAKE_C_COMPILER_ID}")
+    string(REGEX MATCH "GNU" PICO_C_COMPILER_IS_GNU "${CMAKE_C_COMPILER_ID}")
+    string(REGEX MATCH "IAR" PICO_C_COMPILER_IS_IAR "${CMAKE_C_COMPILER_ID}")
+    pico_register_common_scope_var(PICO_C_COMPILER_IS_CLANG)
+    pico_register_common_scope_var(PICO_C_COMPILER_IS_GNU)
+    pico_register_common_scope_var(PICO_C_COMPILER_IS_IAR)
+
     message("Build type is ${CMAKE_BUILD_TYPE}")
     if ("${CMAKE_BUILD_TYPE}" STREQUAL "Debug")
         if (PICO_DEOPTIMIZED_DEBUG)

cmake/preload/toolchains/pico_arm_clang.cmake

@@ -1,4 +1,5 @@
-# NOTE: THIS IS A WIP ONLY PICO_ARM_GCC IS CURRENTLY SUPPORTED
+# NOTE: THIS IS A WIP ONLY PICO_ARM_GCC IS CURRENTLY SUPPORTED, however should work with LLVM Embedded Toolchain for ARM
+# version 14.0.0 https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/tag/release-14.0.0
 # todo there is probably a more "cmake" way of doing this going thru the standard path with our "PICO" platform
 #  i.e. CMake<Lang>Information and whatnot
 include(${CMAKE_CURRENT_LIST_DIR}/find_compiler.cmake)
@@ -37,9 +38,10 @@ set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
 set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
 set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
 
-include_directories(/usr/include/newlib)
-
 option(PICO_DEOPTIMIZED_DEBUG "Build debug builds with -O0" 0)
 
-set(ARM_TOOLCHAIN_COMMON_FLAGS " --target=arm-none-eabi -mcpu=cortex-m0plus -mthumb")
+# Oz is preferred for Clang (verses CMake default -Os) see also https://gitlab.kitware.com/cmake/cmake/-/issues/22458
+set(CMAKE_C_FLAGS_MINSIZEREL "-Oz -DNDEBUG")
+
+set(ARM_TOOLCHAIN_COMMON_FLAGS "--target=armv6m-none-eabi -mfloat-abi=soft -march=armv6m --sysroot ${PICO_COMPILER_DIR}/../lib/clang-runtimes/armv6m_soft_nofp")
 include(${CMAKE_CURRENT_LIST_DIR}/set_flags.cmake)

src/common/pico_binary_info/include/pico/binary_info/code.h

@@ -16,12 +16,12 @@
 #include "pico/binary_info/structure.h"
 
 #if !PICO_NO_BINARY_INFO
-#define __bi_decl(name, bi, section_prefix, attr) static const attr __attribute__((section(section_prefix __STRING(name)))) struct _binary_info_core *name = bi
+#define __bi_decl(name, bi, section_prefix, attr) static const attr __attribute__((section(section_prefix __STRING(name)))) struct _binary_info_core *const name = bi
 #define __bi_lineno_var_name __CONCAT(__bi_, __LINE__)
 #define __bi_ptr_lineno_var_name __CONCAT(__bi_ptr, __LINE__)
 #define __bi_enclosure_check_lineno_var_name __CONCAT(_error_bi_is_missing_enclosing_decl_,__LINE__)
 #define __bi_mark_enclosure static const __unused int __bi_enclosure_check_lineno_var_name=0;
-#if !defined(__GNUC__) || __cplusplus || __GNUC__ >= 8
+#if __cplusplus || __GNUC__ >= 8
 #define __bi_enclosure_check(x) (x + __bi_enclosure_check_lineno_var_name)
 #else
 // skip the version check on older GCC non C++, as it doesn't compile.. this is only here to catch the
@@ -39,10 +39,10 @@
  * binary information declared this way will also be stripped
  * \ingroup pico_binary_info
  */
-#define bi_decl_if_func_used(_decl) ({__bi_mark_enclosure _decl; __bi_decl(__bi_ptr_lineno_var_name, &__bi_lineno_var_name.core, ".binary_info.", ); *(volatile uint8_t *)&__bi_ptr_lineno_var_name;});
+#define bi_decl_if_func_used(_decl) ({__bi_mark_enclosure _decl; __bi_decl(__bi_ptr_lineno_var_name, &__bi_lineno_var_name.core, ".binary_info.", ); *(const volatile uint8_t *)&__bi_ptr_lineno_var_name;});
 
 #define bi_decl_with_attr(_decl, _attr) __bi_mark_enclosure _attr _decl; __bi_decl(__bi_ptr_lineno_var_name, &__bi_lineno_var_name.core, ".binary_info.keep.", __used);
-#define bi_decl_if_func_used_with_attr(_decl, _attr) ({__bi_mark_enclosure _attr _decl; __bi_decl(__bi_ptr_lineno_var_name, &__bi_lineno_var_name.core, ".binary_info.", ); *(volatile uint8_t *)&__bi_ptr_lineno_var_name;});
+#define bi_decl_if_func_used_with_attr(_decl, _attr) ({__bi_mark_enclosure _attr _decl; __bi_decl(__bi_ptr_lineno_var_name, &__bi_lineno_var_name.core, ".binary_info.", ); *(const volatile uint8_t *)&__bi_ptr_lineno_var_name;});
 #else
 #define __bi_decl(bi, name, attr)
 #define bi_decl_with_attr(_decl, _attr)

src/common/pico_sync/sem.c

@@ -15,7 +15,12 @@ void sem_init(semaphore_t *sem, int16_t initial_permits, int16_t max_permits) {
 }
 
 int __time_critical_func(sem_available)(semaphore_t *sem) {
+#ifdef __GNUC__
     return *(volatile typeof(sem->permits) *) &sem->permits;
+#else
+    static_assert(sizeof(sem->permits) == 2, "");
+    return *(volatile int16_t *) &sem->permits;
+#endif
 }
 
 void __time_critical_func(sem_acquire_blocking)(semaphore_t *sem) {

src/common/pico_time/time.c

@@ -22,7 +22,7 @@ typedef struct alarm_pool_entry {
     void *user_data;
 } alarm_pool_entry_t;
 
-typedef struct alarm_pool {
+struct alarm_pool {
     pheap_t *heap;
     spin_lock_t *lock;
     alarm_pool_entry_t *entries;
@@ -32,7 +32,7 @@ typedef struct alarm_pool {
     alarm_id_t alarm_in_progress; // this is set during a callback from the IRQ handler... it can be cleared by alarm_cancel to prevent repeats
     uint8_t hardware_alarm_num;
     uint8_t core_num;
-} alarm_pool_t;
+};
 
 #if !PICO_TIME_DEFAULT_ALARM_POOL_DISABLED
 // To avoid bringing in calloc, we statically allocate the arrays and the heap

src/common/pico_util/include/pico/util/queue.h

@@ -59,7 +59,7 @@ void queue_init_with_spinlock(queue_t *q, uint element_size, uint element_count,
  * \param element_count Maximum number of entries in the queue
  */
 static inline void queue_init(queue_t *q, uint element_size, uint element_count) {
-    return queue_init_with_spinlock(q, element_size, element_count, next_striped_spin_lock_num());
+    queue_init_with_spinlock(q, element_size, element_count, next_striped_spin_lock_num());
 }
 
 /*! \brief Destroy the specified queue.

src/rp2_common/boot_stage2/CMakeLists.txt

@@ -40,9 +40,9 @@ function(pico_define_boot_stage2 NAME SOURCES)
     )
 
     # todo bit of an abstraction failure - revisit for Clang support anyway
-    if (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    if (PICO_C_COMPILER_IS_CLANG)
         target_link_options(${NAME} PRIVATE "-nostdlib")
-    else ()
+    elseif (PICO_C_COMPILER_IS_GNU)
         target_link_options(${NAME} PRIVATE "--specs=nosys.specs")
         target_link_options(${NAME} PRIVATE "-nostartfiles")
     endif ()

src/rp2_common/hardware_claim/claim.c

@@ -6,7 +6,7 @@
 
 #include "hardware/claim.h"
 
-uint32_t hw_claim_lock() {
+uint32_t hw_claim_lock(void) {
     return spin_lock_blocking(spin_lock_instance(PICO_SPINLOCK_ID_HARDWARE_CLAIM));
 }
 

src/rp2_common/hardware_clocks/clocks.c

@@ -78,8 +78,7 @@ bool clock_configure(enum clock_index clk_index, uint32_t src, uint32_t auxsrc,
             // Note XOSC_COUNT is not helpful here because XOSC is not
             // necessarily running, nor is timer... so, 3 cycles per loop:
             uint delay_cyc = configured_freq[clk_sys] / configured_freq[clk_index] + 1;
-            asm volatile (
-                ".syntax unified \n\t"
+            unified_asm (
                 "1: \n\t"
                 "subs %0, #1 \n\t"
                 "bne 1b"

src/rp2_common/hardware_divider/include/hardware/divider.h

@@ -85,10 +85,10 @@ static inline void hw_divider_wait_ready(void) {
     // we use one less register and instruction than gcc which uses a TST instruction
 
     uint32_t tmp; // allow compiler to pick scratch register
-    asm volatile (
+    unified_asm (
     "hw_divider_result_loop_%=:"
     "ldr %0, [%1, %2]\n\t"
-    "lsr %0, #1\n\t"
+    "lsrs %0, %0, #1\n\t"
     "bcc hw_divider_result_loop_%=\n\t"
     : "=&l" (tmp)
     : "l" (sio_hw), "I" (SIO_DIV_CSR_OFFSET)
@@ -105,7 +105,8 @@ static inline void hw_divider_wait_ready(void) {
  */
 static inline divmod_result_t hw_divider_result_nowait(void) {
     // as ugly as this looks it is actually quite efficient
-    divmod_result_t rc = (((divmod_result_t) sio_hw->div_remainder) << 32u) | sio_hw->div_quotient;
+    divmod_result_t rc = ((divmod_result_t) sio_hw->div_remainder) << 32u;
+    rc |= sio_hw->div_quotient;
     return rc;
 }
 
@@ -295,7 +296,7 @@ static inline int32_t hw_divider_remainder_s32(int32_t a, int32_t b) {
  *  \ingroup hardware_divider
  */
 static inline void hw_divider_pause(void) {
-    asm volatile (
+    unified_asm (
     "b _1_%=\n"
     "_1_%=:\n"
     "b _2_%=\n"

src/rp2_common/hardware_dma/dma.c

@@ -13,8 +13,8 @@ check_hw_size(dma_channel_hw_t, DMA_CHAN_STRIDE);
 check_hw_layout(dma_hw_t, abort, DMA_CHAN_ABORT_OFFSET);
 
 // sanity check
-static_assert(__builtin_offsetof(dma_hw_t, ch[0].ctrl_trig) == DMA_CH0_CTRL_TRIG_OFFSET, "hw mismatch");
-static_assert(__builtin_offsetof(dma_hw_t, ch[1].ctrl_trig) == DMA_CH1_CTRL_TRIG_OFFSET, "hw mismatch");
+static_assert(offsetof(dma_hw_t, ch[0].ctrl_trig) == DMA_CH0_CTRL_TRIG_OFFSET, "hw mismatch");
+static_assert(offsetof(dma_hw_t, ch[1].ctrl_trig) == DMA_CH1_CTRL_TRIG_OFFSET, "hw mismatch");
 
 static_assert(NUM_DMA_CHANNELS <= 16, "");
 static uint16_t _claimed;

src/rp2_common/hardware_flash/flash.c

@@ -41,7 +41,7 @@ static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void) {
 }
 
 static void __no_inline_not_in_flash_func(flash_enable_xip_via_boot2)(void) {
-    ((void (*)(void))boot2_copyout+1)();
+    ((void (*)(void))((intptr_t)boot2_copyout+1))();
 }
 
 #else

src/rp2_common/hardware_i2c/i2c.c

@@ -27,9 +27,7 @@ static inline void i2c_unreset(i2c_inst_t *i2c) {
 
 // Addresses of the form 000 0xxx or 111 1xxx are reserved. No slave should
 // have these addresses.
-static inline bool i2c_reserved_addr(uint8_t addr) {
-    return (addr & 0x78) == 0 || (addr & 0x78) == 0x78;
-}
+#define i2c_reserved_addr(addr) (((addr) & 0x78) == 0 || ((addr) & 0x78) == 0x78)
 
 uint i2c_init(i2c_inst_t *i2c, uint baudrate) {
     i2c_reset(i2c);

src/rp2_common/hardware_irq/include/hardware/irq.h

@@ -10,7 +10,7 @@
 // These two config items are also used by assembler, so keeping separate
 // PICO_CONFIG: PICO_MAX_SHARED_IRQ_HANDLERS, Maximum number of shared IRQ handlers, default=4, advanced=true, group=hardware_irq
 #ifndef PICO_MAX_SHARED_IRQ_HANDLERS
-#define PICO_MAX_SHARED_IRQ_HANDLERS 4u
+#define PICO_MAX_SHARED_IRQ_HANDLERS 4
 #endif
 
 // PICO_CONFIG: PICO_DISABLE_SHARED_IRQ_HANDLERS, Disable shared IRQ handlers, type=bool, default=0, group=hardware_irq

src/rp2_common/hardware_irq/irq.c

@@ -186,11 +186,11 @@ static inline int8_t slot_diff(struct irq_handler_chain_slot *to, struct irq_han
     int32_t result = 0xaaaa;
     // return (to - from);
     // note this implementation has limited range, but is fine for plenty more than -128->127 result
-    asm (".syntax unified\n"
+    unified_asm (
          "subs %1, %2\n"
          "adcs %1, %1\n" // * 2 (and + 1 if negative for rounding)
          "muls %0, %1\n"
-         "lsrs %0, 20\n"
+         "lsrs %0, %0, #20\n"
          : "+l" (result), "+l" (to)
          : "l" (from)
          :
@@ -221,9 +221,9 @@ void irq_add_shared_handler(uint num, irq_handler_t handler, uint8_t order_prior
         // start new chain
         hard_assert(vtable_handler == __unhandled_user_irq);
         struct irq_handler_chain_slot slot_data = {
-                .inst1 = 0xa100,                                                    // add r1, pc, #0
-                .inst2 = make_branch(&slot->inst2, irq_handler_chain_first_slot),   // b irq_handler_chain_first_slot
-                .inst3 = 0xbd01,                                                    // pop {r0, pc}
+                .inst1 = 0xa100,                                                             // add r1, pc, #0
+                .inst2 = make_branch(&slot->inst2, (void *) irq_handler_chain_first_slot),   // b irq_handler_chain_first_slot
+                .inst3 = 0xbd01,                                                             // pop {r0, pc}
                 .link = -1,
                 .priority = order_priority,
                 .handler = handler
@@ -233,7 +233,7 @@ void irq_add_shared_handler(uint num, irq_handler_t handler, uint8_t order_prior
     } else {
         assert(!((((uintptr_t)vtable_handler) - ((uintptr_t)irq_handler_chain_slots) - 1)%sizeof(struct irq_handler_chain_slot)));
         struct irq_handler_chain_slot *prev_slot = NULL;
-        struct irq_handler_chain_slot *existing_vtable_slot = remove_thumb_bit(vtable_handler);
+        struct irq_handler_chain_slot *existing_vtable_slot = remove_thumb_bit((void *) vtable_handler);
         struct irq_handler_chain_slot *cur_slot = existing_vtable_slot;
         while (cur_slot->priority > order_priority) {
             prev_slot = cur_slot;
@@ -259,9 +259,9 @@ void irq_add_shared_handler(uint num, irq_handler_t handler, uint8_t order_prior
         } else {
             // update with new chain head
             struct irq_handler_chain_slot slot_data = {
-                    .inst1 = 0xa100,                                                    // add r1, pc, #0
-                    .inst2 = make_branch(&slot->inst2, irq_handler_chain_first_slot),   // b irq_handler_chain_first_slot
-                    .inst3 = make_branch(&slot->inst3, existing_vtable_slot),           // b existing_slot
+                    .inst1 = 0xa100,                                                             // add r1, pc, #0
+                    .inst2 = make_branch(&slot->inst2, (void *) irq_handler_chain_first_slot),   // b irq_handler_chain_first_slot
+                    .inst3 = make_branch(&slot->inst3, existing_vtable_slot),                    // b existing_slot
                     .link = get_slot_index(existing_vtable_slot),
                     .priority = order_priority,
                     .handler = handler
@@ -309,7 +309,7 @@ void irq_remove_handler(uint num, irq_handler_t handler) {
             hard_assert(!exception || exception == num + VTABLE_FIRST_IRQ);
 
             struct irq_handler_chain_slot *prev_slot = NULL;
-            struct irq_handler_chain_slot *existing_vtable_slot = remove_thumb_bit(vtable_handler);
+            struct irq_handler_chain_slot *existing_vtable_slot = remove_thumb_bit((void *) vtable_handler);
             struct irq_handler_chain_slot *to_free_slot = existing_vtable_slot;
             while (to_free_slot->handler != handler) {
                 prev_slot = to_free_slot;
@@ -354,7 +354,7 @@ void irq_remove_handler(uint num, irq_handler_t handler) {
                         // it to bl to irq_handler_chain_remove_tail which will remove the slot.
                         // NOTE THAT THIS TRASHES PRIORITY AND LINK SINCE THIS IS A 4 BYTE INSTRUCTION
                         //      BUT THEY ARE NOT NEEDED NOW
-                        insert_branch_and_link(&to_free_slot->inst3, irq_handler_chain_remove_tail);
+                        insert_branch_and_link(&to_free_slot->inst3, (void *) irq_handler_chain_remove_tail);
                     }
                 }
             } else {

src/rp2_common/hardware_sync/include/hardware/sync.h

@@ -114,28 +114,34 @@ typedef volatile uint32_t spin_lock_t;
 
  * The SEV (send event) instruction sends an event to both cores.
  */
+#if !__has_builtin(__sev)
 __force_inline static void __sev(void) {
-    __asm volatile ("sev");
+    unified_asm ("sev");
 }
+#endif
 
 /*! \brief Insert a WFE instruction in to the code path.
  *  \ingroup hardware_sync
  *
  * The WFE (wait for event) instruction waits until one of a number of
  * events occurs, including events signalled by the SEV instruction on either core.
  */
+#if !__has_builtin(__wfe)
 __force_inline static void __wfe(void) {
-    __asm volatile ("wfe");
+    unified_asm ("wfe");
 }
+#endif
 
 /*! \brief Insert a WFI instruction in to the code path.
   *  \ingroup hardware_sync
 *
  * The WFI (wait for interrupt) instruction waits for a interrupt to wake up the core.
  */
+#if !__has_builtin(__wfi)
 __force_inline static void __wfi(void) {
-    __asm volatile ("wfi");
+    unified_asm ("wfi");
 }
+#endif
 
 /*! \brief Insert a DMB instruction in to the code path.
  *  \ingroup hardware_sync
@@ -144,7 +150,7 @@ __force_inline static void __wfi(void) {
  * instruction will be observed before any explicit access after the instruction.
  */
 __force_inline static void __dmb(void) {
-    __asm volatile ("dmb" : : : "memory");
+    unified_asm ("dmb" : : : "memory");
 }
 
 /*! \brief Insert a DSB instruction in to the code path.
@@ -155,7 +161,7 @@ __force_inline static void __dmb(void) {
  * accesses before this instruction complete.
  */
 __force_inline static void __dsb(void) {
-    __asm volatile ("dsb" : : : "memory");
+    unified_asm ("dsb" : : : "memory");
 }
 
 /*! \brief Insert a ISB instruction in to the code path.
@@ -166,7 +172,7 @@ __force_inline static void __dsb(void) {
  * the ISB instruction has been completed.
  */
 __force_inline static void __isb(void) {
-    __asm volatile ("isb");
+    unified_asm ("isb");
 }
 
 /*! \brief Acquire a memory fence
@@ -207,8 +213,8 @@ __force_inline static void __mem_fence_release(void) {
  */
 __force_inline static uint32_t save_and_disable_interrupts(void) {
     uint32_t status;
-    __asm volatile ("mrs %0, PRIMASK" : "=r" (status)::);
-    __asm volatile ("cpsid i");
+    unified_asm ("mrs %0, PRIMASK" : "=r" (status)::);
+    unified_asm ("cpsid i");
     return status;
 }
 
@@ -218,7 +224,7 @@ __force_inline static uint32_t save_and_disable_interrupts(void) {
  * \param status Previous interrupt status from save_and_disable_interrupts()
   */
 __force_inline static void restore_interrupts(uint32_t status) {
-    __asm volatile ("msr PRIMASK,%0"::"r" (status) : );
+    unified_asm ("msr PRIMASK,%0"::"r" (status) : );
 }
 
 /*! \brief Get HW Spinlock instance from number
@@ -389,7 +395,8 @@ int spin_lock_claim_unused(bool required);
  */
 bool spin_lock_is_claimed(uint lock_num);
 
-#define remove_volatile_cast(t, x) ({__mem_fence_acquire(); (t)(x); })
+// no longer use __mem_fence_acquire here, as it is overkill on cortex M0+
+#define remove_volatile_cast(t, x) ({__compiler_memory_barrier(); Clang_Pragma("clang diagnostic push"); Clang_Pragma("clang diagnostic ignored \"-Wcast-qual\""); (t)(x); Clang_Pragma("clang diagnostic pop"); })
 
 #ifdef __cplusplus
 }

src/rp2_common/pico_bootrom/bootrom.c

@@ -8,10 +8,6 @@
 
 /// \tag::table_lookup[]
 
-// Bootrom function: rom_table_lookup
-// Returns the 32 bit pointer into the ROM if found or NULL otherwise.
-typedef void *(*rom_table_lookup_fn)(uint16_t *table, uint32_t code);
-
 void *rom_func_lookup(uint32_t code) {
     return rom_func_lookup_inline(code);
 }

src/rp2_common/pico_bootrom/include/pico/bootrom.h

@@ -116,7 +116,7 @@ bool rom_funcs_lookup(uint32_t *table, unsigned int count);
 // Returns the 32 bit pointer into the ROM if found or NULL otherwise.
 typedef void *(*rom_table_lookup_fn)(uint16_t *table, uint32_t code);
 
-#if defined(__GNUC__) && (__GNUC__ >= 12)
+#if PICO_C_COMPILER_IS_GNU && (__GNUC__ >= 12)
 // Convert a 16 bit pointer stored at the given rom address into a 32 bit pointer
 static inline void *rom_hword_as_ptr(uint16_t rom_address) {
 #pragma GCC diagnostic push

src/rp2_common/pico_cyw43_driver/cyw43_bus_pio_spi.c

@@ -63,7 +63,7 @@ static uint32_t counter = 0;
 
 //#define SWAP32(A) ((((A) & 0xff000000U) >> 8) | (((A) & 0xff0000U) << 8) | (((A) & 0xff00U) >> 8) | (((A) & 0xffU) << 8))
 __force_inline static uint32_t __swap16x2(uint32_t a) {
-    __asm ("rev16 %0, %0" : "+l" (a) : : );
+    unified_asm ("rev16 %0, %0" : "+l" (a) : : );
     return a;
 }
 #define SWAP32(a) __swap16x2(a)