Virtual Memory Management Simulator

A high-performance, C (C99) virtual memory management simulator that models the core behavior of a Memory Management Unit (MMU). It simulates the interaction between the CPU and physical memory, implementing hierarchical page tables, a Translation Lookaside Buffer (TLB), and demand paging. The simulator performs logical-to-physical address translation under constrained memory resources, using cache management and page replacement strategies to improve hit rate and throughput.

Key Features

• TLB with LRU eviction: Implements an LRU policy for the TLB using a custom doubly linked list, enabling O(1) updates and evictions to optimize cache hit rates.
• Hardware-like address decoding: Uses bitwise operations to mimic hardware address parsing. Masking and shifting (e.g., 0x3FFFFF, >> 12) extract the page number and offset directly from 32-bit addresses.
• Page fault handling: Uses a FIFO page replacement policy for physical frame allocation. When memory is full, the simulator tracks fifo_head to evict the oldest page and maintain consistency.
• Dockerized environment: Includes a Dockerfile (Ubuntu 22.04) for a consistent, reproducible build and run environment across machines.
• Memory safety: Strict manual memory management (malloc/free) for dynamic TLB nodes, validated with Valgrind to ensure zero memory leaks during execution.

Tech Stack

• Language: C (C99)
• Build: GNU Make
• Containerization: Docker
• Algorithms / Data Structures: LRU (doubly linked list), FIFO (queue), hashing / fast indexing
• Tools: Valgrind (leak detection), clang-format (code style)

Project Structure

• main.c: Core logic including the simulation loop, address parsing, TLB lookup, and page fault handling.
• memory.h: Key data structures (e.g., PageTableEntry, TLBNode) and system constants (e.g., page size 4KB, memory size 1MB).
• Makefile: Build script that produces the translate executable.
• Dockerfile: Reproducible Linux environment configuration.
• cases/: Task input cases and expected outputs (for validation).

System Architecture

graph TD;
    CPU[CPU / Logical Addr] -->|Lookup| TLB[TLB Cache];
    TLB -->|Hit| PA[Physical Memory];
    TLB -->|Miss| PT[Page Table];
    PT -->|Mapped| PA;
    PT -->|Page Fault| Handler[FIFO Eviction Handler];
    Handler -->|Update| TLB;

Loading

Usage

Compile locally

From the project root:

make

This generates the translate executable.

Run with Docker (recommended)

Build the image:

docker build -t vm-sim .

Start a container shell:

docker run -it vm-sim /bin/bash

Run the simulator

The program processes a file of logical addresses based on the specified task mode:

./translate -f <input_file> -t <task_mode>

• -f: Path to the input file containing logical addresses
• -t: Simulation mode (task1 to task4)
  • Note: task4 runs the full simulation with TLB and LRU eviction

Example:

./translate -f cases/task4/basic.txt -t task4

Academic Disclaimer

This project was created for educational purposes as part of the Computer Systems course at the University of Melbourne. Please do not copy this code for your own coursework submission to avoid academic misconduct.