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Merge pull request #74 from pycom/doniks-pyjtag-docs-improvements
pyjtag clarifications
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Short readme for how to use the PyJTAG.
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# Short readme for how to use the PyJTAG
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Create the firmware with BTYPE=debug flag.
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Create the firmware with `BTYPE=debug` flag.
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Do not use the default pins assigned to UART, SPI, CAN because they are used by the JTAG. Pins not to be used: P4, P9, P10, P23
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Detailed information are here: https://pycomiot.atlassian.net/wiki/spaces/FIR/pages/966295564/Usage+of+PyJTAG
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Setup the PyJTAG board's switches:
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ESP32 JTAG: all turned ON
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ESP32 B.LOADER: all turned ON except SAFE_BOOT_SW which is OFF
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TO LTE UART 1/2: does not matter
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CURRENT SHUNTS: connected
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* ESP32 JTAG: all turned ON
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* ESP32 B.LOADER: all turned ON except SAFE_BOOT_SW which is OFF
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* TO LTE UART 1/2: does not matter
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* CURRENT SHUNTS: connected
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Place the Pycom board with the reset button towards the Current Shunts.
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Generally follow these rules to setup JTAG debugging on your OS: https://docs.espressif.com/projects/esp-idf/en/latest/api-guides/jtag-debugging/index.html
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(Download link of OpenOCD for ESP32 from Espressif: https://github.com/espressif/openocd-esp32/releases)
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Running OpenOCD assuming the current location is "esp32" folder in Firmware-Development repository:
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Start OpenOCD: "PATH_TO_OPENOCD/bin/openocd -s PATH_TO_OPENOCD/share/openocd/scripts -s PyJTAG -f PyJTAG/interface/ftdi/esp32-pycom.cfg -f PyJTAG/board/esp32-pycom.cfg"
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Output should be like:
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Connect the PyJTAG via usb. You see four new USB devices:
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```
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$ lsusb -d 0403:
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Bus 001 Device 010: ID 0403:6011 Future Technology Devices International, Ltd FT4232H Quad HS USB-UART/FIFO IC
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$ ls /dev/ttyUSB?
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/dev/ttyUSB0 /dev/ttyUSB1 /dev/ttyUSB2 /dev/ttyUSB3
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```
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Go to `esp32` folder in Firmware-Development repository and run:
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```
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PATH_TO_OPENOCD/bin/openocd -s PATH_TO_OPENOCD/share/openocd/scripts -s PyJTAG -f PyJTAG/interface/ftdi/esp32-pycom.cfg -f PyJTAG/board/esp32-pycom.cfg
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```
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Output should be like:
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```
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Open On-Chip Debugger v0.10.0-esp32-20191114 (2019-11-14-14:15)
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Licensed under GNU GPL v2
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For bug reports, read
@@ -34,9 +47,11 @@ Info : clock speed 20000 kHz
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Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
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Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
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Info : Listening on port 3333 for gdb connections
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```
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When OpenOCD is running, start GDB from `esp32` folder. Assuming you have a FIPY:
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```
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xtensa-esp32-elf-gdb -x PyJTAG/gdbinit build/FIPY/debug/application.elf
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```
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When OpenOCD is running start GDB from "esp32" folder assuming you have a FIPY:
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"xtensa-esp32-elf-gdb -x PyJTAG/gdbinit build/FIPY/debug/application.elf"
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In "PyJTAG/gdbinit" a breakpoint is configured at TASK_Micropython, execution should stop there first.
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In `PyJTAG/gdbinit` a breakpoint is configured at `TASK_Micropython`, so execution should stop there first.

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