frontend: Update descriptor-based frontend (#18, #26)

* frontend: Create a dataflow-oriented descriptor-based iDMA frontend supporting prefetching. #18

* systems/cva6_desc: Various fixes #26

---------

Co-authored-by: Axel Vanoni <axvanoni@ethz.ch>

Co-authored-by: iburaky-ids

.gitignore

@@ -10,3 +10,4 @@ nonfree
 working_dir
 bender
 morty
+todo

Bender.yml

@@ -56,22 +56,28 @@ sources:
   - target: rtl
     files:
       # Level 0
-      - src/frontend/desc64/idma_desc64_shared_counter.sv
+      - src/frontend/desc64/idma_desc64_ar_gen.sv
+      - src/frontend/desc64/idma_desc64_ar_gen_prefetch.sv
+      - src/frontend/desc64/idma_desc64_reader.sv
+      - src/frontend/desc64/idma_desc64_reader_gater.sv
+      - src/frontend/desc64/idma_desc64_reshaper.sv
       - src/frontend/idma_transfer_id_gen.sv
       # Level 1
       - src/frontend/desc64/idma_desc64_reg_wrapper.sv
       # Level 2
-      - src/frontend/desc64/idma_desc64.sv
-
+      - src/frontend/desc64/idma_desc64_top.sv
+      - src/frontend/desc64/idma_desc64_cva6_wrap.sv
 
   # Synthesis wrappers
   - target: synth
     files:
       # Level 0
       - src/frontend/desc64/idma_desc64_synth_pkg.sv
+      - src/frontend/desc64/idma_desc64_cva6_synth_pkg.sv
       - src/synth/idma_nd_backend_synth.sv
       # Level 1
       - src/frontend/desc64/idma_desc64_synth.sv
+      - src/frontend/desc64/idma_desc64_cva6_synth.sv
 
   # Testbenches
   - target: test
@@ -80,6 +86,7 @@ sources:
       - test/tb_idma_improved_fifo.sv
       - test/tb_idma_nd_backend.sv
       - test/frontend/tb_idma_desc64.sv
+      - test/frontend/tb_idma_desc64_bench.sv
       - test/future/idma_tb_per2axi.sv
       - test/future/idma_obi_asserter.sv
       - test/future/TLToAXI4.v

jobs/jobs.json

@@ -131,5 +131,16 @@
         "proc_id" : "rw_axi",
         "testbench": "tb_idma_nd_backend",
         "synth_top": "idma_nd_backend_synth"
+    },
+    "frontend-descriptor": {
+        "seed" : 1336,
+        "jobs" : {
+            "simple" : ""
+        },
+        "params" : {
+        },
+        "proc_id" : "rw_axi",
+        "testbench" : "tb_idma_desc64_top",
+        "synth_top" : "idma_desc64_synth",
     }
 }

src/frontend/desc64/idma_desc64.hjson

@@ -1,9 +1,9 @@
-// Copyright 2022 ETH Zurich and University of Bologna.
+// Copyright 2023 ETH Zurich and University of Bologna.
 // Solderpad Hardware License, Version 0.51, see LICENSE for details.
 // SPDX-License-Identifier: SHL-0.51
 
 // Authors:
-// - Axel Vanoni <axvanoni@student.ethz.ch>
+// - Axel Vanoni <axvanoni@ethz.ch>
 
 {
 	name: idma_desc64